spear.h 3.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * SPEAr3xx/6xx Machine family specific definition
  4. *
  5. * Copyright (C) 2009,2012 ST Microelectronics
  6. * Rajeev Kumar<[email protected]>
  7. * Viresh Kumar <[email protected]>
  8. */
  9. #ifndef __MACH_SPEAR_H
  10. #define __MACH_SPEAR_H
  11. #include <asm/memory.h>
  12. #if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX)
  13. /* ICM1 - Low speed connection */
  14. #define SPEAR_ICM1_2_BASE UL(0xD0000000)
  15. #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000)
  16. #define SPEAR_ICM1_UART_BASE UL(0xD0000000)
  17. #define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE)
  18. #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
  19. /* ML-1, 2 - Multi Layer CPU Subsystem */
  20. #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
  21. #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000)
  22. /* ICM3 - Basic Subsystem */
  23. #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
  24. #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000)
  25. #define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
  26. #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
  27. #define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE)
  28. #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000)
  29. #define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE)
  30. /* Debug uart for linux, will be used for debug and uncompress messages */
  31. #define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE
  32. /* Sysctl base for spear platform */
  33. #define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE
  34. #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE
  35. #endif /* SPEAR3xx || SPEAR6XX */
  36. /* SPEAr320 Macros */
  37. #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
  38. #define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000)
  39. #ifdef CONFIG_ARCH_SPEAR13XX
  40. #define PERIP_GRP2_BASE UL(0xB3000000)
  41. #define VA_PERIP_GRP2_BASE IOMEM(0xF9000000)
  42. #define MCIF_SDHCI_BASE UL(0xB3000000)
  43. #define SYSRAM0_BASE UL(0xB3800000)
  44. #define VA_SYSRAM0_BASE IOMEM(0xF9800000)
  45. #define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600)
  46. #define PERIP_GRP1_BASE UL(0xE0000000)
  47. #define VA_PERIP_GRP1_BASE IOMEM(0xFD000000)
  48. #define UART_BASE UL(0xE0000000)
  49. #define VA_UART_BASE IOMEM(0xFD000000)
  50. #define SSP_BASE UL(0xE0100000)
  51. #define MISC_BASE UL(0xE0700000)
  52. #define VA_MISC_BASE IOMEM(0xFD700000)
  53. #define A9SM_AND_MPMC_BASE UL(0xEC000000)
  54. #define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000)
  55. #define SPEAR1310_RAS_BASE UL(0xD8400000)
  56. #define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000))
  57. /* A9SM peripheral offsets */
  58. #define A9SM_PERIP_BASE UL(0xEC800000)
  59. #define VA_A9SM_PERIP_BASE IOMEM(0xFC800000)
  60. #define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00)
  61. #define L2CC_BASE UL(0xED000000)
  62. #define VA_L2CC_BASE IOMEM(UL(0xFB000000))
  63. /* others */
  64. #define MCIF_CF_BASE UL(0xB2800000)
  65. /* Debug uart for linux, will be used for debug and uncompress messages */
  66. #define SPEAR_DBG_UART_BASE UART_BASE
  67. #endif /* SPEAR13XX */
  68. #endif /* __MACH_SPEAR_H */