regulator-quirk-rcar-gen2.c 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * R-Car Generation 2 da9063(L)/da9210 regulator quirk
  4. *
  5. * Certain Gen2 development boards have an da9063 and one or more da9210
  6. * regulators. All of these regulators have their interrupt request lines
  7. * tied to the same interrupt pin (IRQ2) on the SoC.
  8. *
  9. * After cold boot or da9063-induced restart, both the da9063 and da9210 seem
  10. * to assert their interrupt request lines. Hence as soon as one driver
  11. * requests this irq, it gets stuck in an interrupt storm, as it only manages
  12. * to deassert its own interrupt request line, and the other driver hasn't
  13. * installed an interrupt handler yet.
  14. *
  15. * To handle this, install a quirk that masks the interrupts in both the
  16. * da9063 and da9210. This quirk has to run after the i2c master driver has
  17. * been initialized, but before the i2c slave drivers are initialized.
  18. *
  19. * Copyright (C) 2015 Glider bvba
  20. */
  21. #include <linux/device.h>
  22. #include <linux/i2c.h>
  23. #include <linux/init.h>
  24. #include <linux/io.h>
  25. #include <linux/list.h>
  26. #include <linux/notifier.h>
  27. #include <linux/of.h>
  28. #include <linux/of_irq.h>
  29. #include <linux/mfd/da9063/registers.h>
  30. #define IRQC_BASE 0xe61c0000
  31. #define IRQC_MONITOR 0x104 /* IRQn Signal Level Monitor Register */
  32. #define REGULATOR_IRQ_MASK BIT(2) /* IRQ2, active low */
  33. /* start of DA9210 System Control and Event Registers */
  34. #define DA9210_REG_MASK_A 0x54
  35. struct regulator_quirk {
  36. struct list_head list;
  37. const struct of_device_id *id;
  38. struct device_node *np;
  39. struct of_phandle_args irq_args;
  40. struct i2c_msg i2c_msg;
  41. bool shared; /* IRQ line is shared */
  42. };
  43. static LIST_HEAD(quirk_list);
  44. static void __iomem *irqc;
  45. /* first byte sets the memory pointer, following are consecutive reg values */
  46. static u8 da9063_irq_clr[] = { DA9063_REG_IRQ_MASK_A, 0xff, 0xff, 0xff, 0xff };
  47. static u8 da9210_irq_clr[] = { DA9210_REG_MASK_A, 0xff, 0xff };
  48. static struct i2c_msg da9063_msg = {
  49. .len = ARRAY_SIZE(da9063_irq_clr),
  50. .buf = da9063_irq_clr,
  51. };
  52. static struct i2c_msg da9210_msg = {
  53. .len = ARRAY_SIZE(da9210_irq_clr),
  54. .buf = da9210_irq_clr,
  55. };
  56. static const struct of_device_id rcar_gen2_quirk_match[] = {
  57. { .compatible = "dlg,da9063", .data = &da9063_msg },
  58. { .compatible = "dlg,da9063l", .data = &da9063_msg },
  59. { .compatible = "dlg,da9210", .data = &da9210_msg },
  60. { /* sentinel */ }
  61. };
  62. static int regulator_quirk_notify(struct notifier_block *nb,
  63. unsigned long action, void *data)
  64. {
  65. struct regulator_quirk *pos, *tmp;
  66. struct device *dev = data;
  67. struct i2c_client *client;
  68. static bool done;
  69. int ret;
  70. u32 mon;
  71. if (done)
  72. return 0;
  73. mon = ioread32(irqc + IRQC_MONITOR);
  74. dev_dbg(dev, "%s: %ld, IRQC_MONITOR = 0x%x\n", __func__, action, mon);
  75. if (mon & REGULATOR_IRQ_MASK)
  76. goto remove;
  77. if (action != BUS_NOTIFY_ADD_DEVICE || dev->type == &i2c_adapter_type)
  78. return 0;
  79. client = to_i2c_client(dev);
  80. dev_dbg(dev, "Detected %s\n", client->name);
  81. /*
  82. * Send message to all PMICs that share an IRQ line to deassert it.
  83. *
  84. * WARNING: This works only if all the PMICs are on the same I2C bus.
  85. */
  86. list_for_each_entry(pos, &quirk_list, list) {
  87. if (!pos->shared)
  88. continue;
  89. if (pos->np->parent != client->dev.parent->of_node)
  90. continue;
  91. dev_info(&client->dev, "clearing %s@0x%02x interrupts\n",
  92. pos->id->compatible, pos->i2c_msg.addr);
  93. ret = i2c_transfer(client->adapter, &pos->i2c_msg, 1);
  94. if (ret != 1)
  95. dev_err(&client->dev, "i2c error %d\n", ret);
  96. }
  97. mon = ioread32(irqc + IRQC_MONITOR);
  98. if (mon & REGULATOR_IRQ_MASK)
  99. goto remove;
  100. return 0;
  101. remove:
  102. dev_info(dev, "IRQ2 is not asserted, removing quirk\n");
  103. list_for_each_entry_safe(pos, tmp, &quirk_list, list) {
  104. list_del(&pos->list);
  105. of_node_put(pos->np);
  106. kfree(pos);
  107. }
  108. done = true;
  109. iounmap(irqc);
  110. return 0;
  111. }
  112. static struct notifier_block regulator_quirk_nb = {
  113. .notifier_call = regulator_quirk_notify
  114. };
  115. static int __init rcar_gen2_regulator_quirk(void)
  116. {
  117. struct regulator_quirk *quirk, *pos, *tmp;
  118. struct of_phandle_args *argsa, *argsb;
  119. const struct of_device_id *id;
  120. struct device_node *np;
  121. u32 mon, addr;
  122. int ret;
  123. if (!of_machine_is_compatible("renesas,koelsch") &&
  124. !of_machine_is_compatible("renesas,lager") &&
  125. !of_machine_is_compatible("renesas,porter") &&
  126. !of_machine_is_compatible("renesas,stout") &&
  127. !of_machine_is_compatible("renesas,gose"))
  128. return -ENODEV;
  129. for_each_matching_node_and_match(np, rcar_gen2_quirk_match, &id) {
  130. if (!of_device_is_available(np)) {
  131. of_node_put(np);
  132. break;
  133. }
  134. ret = of_property_read_u32(np, "reg", &addr);
  135. if (ret) /* Skip invalid entry and continue */
  136. continue;
  137. quirk = kzalloc(sizeof(*quirk), GFP_KERNEL);
  138. if (!quirk) {
  139. ret = -ENOMEM;
  140. of_node_put(np);
  141. goto err_mem;
  142. }
  143. argsa = &quirk->irq_args;
  144. memcpy(&quirk->i2c_msg, id->data, sizeof(quirk->i2c_msg));
  145. quirk->id = id;
  146. quirk->np = of_node_get(np);
  147. quirk->i2c_msg.addr = addr;
  148. ret = of_irq_parse_one(np, 0, argsa);
  149. if (ret) { /* Skip invalid entry and continue */
  150. of_node_put(np);
  151. kfree(quirk);
  152. continue;
  153. }
  154. list_for_each_entry(pos, &quirk_list, list) {
  155. argsb = &pos->irq_args;
  156. if (argsa->args_count != argsb->args_count)
  157. continue;
  158. ret = memcmp(argsa->args, argsb->args,
  159. argsa->args_count *
  160. sizeof(argsa->args[0]));
  161. if (!ret) {
  162. pos->shared = true;
  163. quirk->shared = true;
  164. }
  165. }
  166. list_add_tail(&quirk->list, &quirk_list);
  167. }
  168. irqc = ioremap(IRQC_BASE, PAGE_SIZE);
  169. if (!irqc) {
  170. ret = -ENOMEM;
  171. goto err_mem;
  172. }
  173. mon = ioread32(irqc + IRQC_MONITOR);
  174. if (mon & REGULATOR_IRQ_MASK) {
  175. pr_debug("%s: IRQ2 is not asserted, not installing quirk\n",
  176. __func__);
  177. ret = 0;
  178. goto err_free;
  179. }
  180. pr_info("IRQ2 is asserted, installing regulator quirk\n");
  181. bus_register_notifier(&i2c_bus_type, &regulator_quirk_nb);
  182. return 0;
  183. err_free:
  184. iounmap(irqc);
  185. err_mem:
  186. list_for_each_entry_safe(pos, tmp, &quirk_list, list) {
  187. list_del(&pos->list);
  188. of_node_put(pos->np);
  189. kfree(pos);
  190. }
  191. return ret;
  192. }
  193. arch_initcall(rcar_gen2_regulator_quirk);