pm.c 2.6 KB

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  1. /*
  2. * SA1100 Power Management Routines
  3. *
  4. * Copyright (c) 2001 Cliff Brake <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License.
  8. *
  9. * History:
  10. *
  11. * 2001-02-06: Cliff Brake Initial code
  12. *
  13. * 2001-02-25: Sukjae Cho <[email protected]> &
  14. * Chester Kuo <[email protected]>
  15. * Save more value for the resume function! Support
  16. * Bitsy/Assabet/Freebird board
  17. *
  18. * 2001-08-29: Nicolas Pitre <[email protected]>
  19. * Cleaned up, pushed platform dependent stuff
  20. * in the platform specific files.
  21. *
  22. * 2002-05-27: Nicolas Pitre Killed sleep.h and the kmalloced save array.
  23. * Storage is local on the stack now.
  24. */
  25. #include <linux/init.h>
  26. #include <linux/io.h>
  27. #include <linux/suspend.h>
  28. #include <linux/errno.h>
  29. #include <linux/time.h>
  30. #include <mach/hardware.h>
  31. #include <asm/memory.h>
  32. #include <asm/suspend.h>
  33. #include <asm/mach/time.h>
  34. extern int sa1100_finish_suspend(unsigned long);
  35. #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
  36. #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
  37. /*
  38. * List of global SA11x0 peripheral registers to preserve.
  39. * More ones like CP and general purpose register values are preserved
  40. * on the stack and then the stack pointer is stored last in sleep.S.
  41. */
  42. enum { SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
  43. SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR,
  44. SLEEP_SAVE_Ser1SDCR0,
  45. SLEEP_SAVE_COUNT
  46. };
  47. static int sa11x0_pm_enter(suspend_state_t state)
  48. {
  49. unsigned long gpio, sleep_save[SLEEP_SAVE_COUNT];
  50. gpio = GPLR;
  51. /* save vital registers */
  52. SAVE(GPDR);
  53. SAVE(GAFR);
  54. SAVE(PPDR);
  55. SAVE(PPSR);
  56. SAVE(PPAR);
  57. SAVE(PSDR);
  58. SAVE(Ser1SDCR0);
  59. /* Clear previous reset status */
  60. RCSR = RCSR_HWR | RCSR_SWR | RCSR_WDR | RCSR_SMR;
  61. /* set resume return address */
  62. PSPR = __pa_symbol(cpu_resume);
  63. /* go zzz */
  64. cpu_suspend(0, sa1100_finish_suspend);
  65. /*
  66. * Ensure not to come back here if it wasn't intended
  67. */
  68. RCSR = RCSR_SMR;
  69. PSPR = 0;
  70. /*
  71. * Ensure interrupt sources are disabled; we will re-init
  72. * the interrupt subsystem via the device manager.
  73. */
  74. ICLR = 0;
  75. ICCR = 1;
  76. ICMR = 0;
  77. /* restore registers */
  78. RESTORE(GPDR);
  79. RESTORE(GAFR);
  80. RESTORE(PPDR);
  81. RESTORE(PPSR);
  82. RESTORE(PPAR);
  83. RESTORE(PSDR);
  84. RESTORE(Ser1SDCR0);
  85. GPSR = gpio;
  86. GPCR = ~gpio;
  87. /*
  88. * Clear the peripheral sleep-hold bit.
  89. */
  90. PSSR = PSSR_PH;
  91. return 0;
  92. }
  93. static const struct platform_suspend_ops sa11x0_pm_ops = {
  94. .enter = sa11x0_pm_enter,
  95. .valid = suspend_valid_only_mem,
  96. };
  97. int __init sa11x0_pm_init(void)
  98. {
  99. suspend_set_ops(&sa11x0_pm_ops);
  100. return 0;
  101. }