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regs-mem-s3c24xx.h

regs-mem-s3c24xx.h 1.6 KB
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  1. /* SPDX-License-Identifier: GPL-2.0 */
    2. 

  2. /*
    3. 

  3.  * Copyright (c) 2004 Simtec Electronics <[email protected]>
    4. 

  4.  *		http://www.simtec.co.uk/products/SWLINUX/
    5. 

  5.  *
    6. 

  6.  * S3C2410 Memory Control register definitions
    7. 

  7.  */
    8. 

  8. 

  9. #ifndef __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H
    10. 

  10. #define __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H __FILE__
    11. 

  11. 

  12. #include "map-s3c.h"
    13. 

  13. 

  14. #define S3C2410_MEMREG(x)		(S3C24XX_VA_MEMCTRL + (x))
    15. 

  15. 

  16. #define S3C2410_BWSCON			S3C2410_MEMREG(0x00)
    17. 

  17. #define S3C2410_BANKCON0		S3C2410_MEMREG(0x04)
    18. 

  18. #define S3C2410_BANKCON1		S3C2410_MEMREG(0x08)
    19. 

  19. #define S3C2410_BANKCON2		S3C2410_MEMREG(0x0C)
    20. 

  20. #define S3C2410_BANKCON3		S3C2410_MEMREG(0x10)
    21. 

  21. #define S3C2410_BANKCON4		S3C2410_MEMREG(0x14)
    22. 

  22. #define S3C2410_BANKCON5		S3C2410_MEMREG(0x18)
    23. 

  23. #define S3C2410_BANKCON6		S3C2410_MEMREG(0x1C)
    24. 

  24. #define S3C2410_BANKCON7		S3C2410_MEMREG(0x20)
    25. 

  25. #define S3C2410_REFRESH			S3C2410_MEMREG(0x24)
    26. 

  26. #define S3C2410_BANKSIZE		S3C2410_MEMREG(0x28)
    27. 

  27. 

  28. #define S3C2410_BWSCON_ST1		(1 << 7)
    29. 

  29. #define S3C2410_BWSCON_ST2		(1 << 11)
    30. 

  30. #define S3C2410_BWSCON_ST3		(1 << 15)
    31. 

  31. #define S3C2410_BWSCON_ST4		(1 << 19)
    32. 

  32. #define S3C2410_BWSCON_ST5		(1 << 23)
    33. 

  33. 

  34. #define S3C2410_BWSCON_GET(_bwscon, _bank) (((_bwscon) >> ((_bank) * 4)) & 0xf)
    35. 

  35. 

  36. #define S3C2410_BWSCON_WS		(1 << 2)
    37. 

  37. 

  38. #define S3C2410_BANKCON_PMC16		(0x3)
    39. 

  39. 

  40. #define S3C2410_BANKCON_Tacp_SHIFT	(2)
    41. 

  41. #define S3C2410_BANKCON_Tcah_SHIFT	(4)
    42. 

  42. #define S3C2410_BANKCON_Tcoh_SHIFT	(6)
    43. 

  43. #define S3C2410_BANKCON_Tacc_SHIFT	(8)
    44. 

  44. #define S3C2410_BANKCON_Tcos_SHIFT	(11)
    45. 

  45. #define S3C2410_BANKCON_Tacs_SHIFT	(13)
    46. 

  46. 

  47. #define S3C2410_BANKCON_SDRAM		(0x3 << 15)
    48. 

  48. 

  49. #define S3C2410_REFRESH_SELF		(1 << 22)
    50. 

  50. 

  51. #define S3C2410_BANKSIZE_MASK		(0x7 << 0)
    52. 

  52. 

  53. #endif /* __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H */
    54.