pm-s3c24xx.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // Copyright (c) 2004-2006 Simtec Electronics
  4. // Ben Dooks <[email protected]>
  5. //
  6. // S3C24XX Power Manager (Suspend-To-RAM) support
  7. //
  8. // See Documentation/arm/samsung-s3c24xx/suspend.rst for more information
  9. //
  10. // Parts based on arch/arm/mach-pxa/pm.c
  11. //
  12. // Thanks to Dimitry Andric for debugging
  13. #include <linux/init.h>
  14. #include <linux/suspend.h>
  15. #include <linux/errno.h>
  16. #include <linux/time.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/serial_s3c.h>
  21. #include <linux/io.h>
  22. #include "regs-clock.h"
  23. #include "regs-gpio.h"
  24. #include "regs-irq.h"
  25. #include "gpio-samsung.h"
  26. #include <asm/mach/time.h>
  27. #include "gpio-cfg.h"
  28. #include "pm.h"
  29. #include "regs-mem-s3c24xx.h"
  30. #define PFX "s3c24xx-pm: "
  31. #ifdef CONFIG_PM_SLEEP
  32. static struct sleep_save core_save[] = {
  33. /* we restore the timings here, with the proviso that the board
  34. * brings the system up in an slower, or equal frequency setting
  35. * to the original system.
  36. *
  37. * if we cannot guarantee this, then things are going to go very
  38. * wrong here, as we modify the refresh and both pll settings.
  39. */
  40. SAVE_ITEM(S3C2410_BWSCON),
  41. SAVE_ITEM(S3C2410_BANKCON0),
  42. SAVE_ITEM(S3C2410_BANKCON1),
  43. SAVE_ITEM(S3C2410_BANKCON2),
  44. SAVE_ITEM(S3C2410_BANKCON3),
  45. SAVE_ITEM(S3C2410_BANKCON4),
  46. SAVE_ITEM(S3C2410_BANKCON5),
  47. };
  48. #endif
  49. /* s3c_pm_check_resume_pin
  50. *
  51. * check to see if the pin is configured correctly for sleep mode, and
  52. * make any necessary adjustments if it is not
  53. */
  54. static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs)
  55. {
  56. unsigned long irqstate;
  57. unsigned long pinstate;
  58. int irq = gpio_to_irq(pin);
  59. if (irqoffs < 4)
  60. irqstate = s3c_irqwake_intmask & (1L<<irqoffs);
  61. else
  62. irqstate = s3c_irqwake_eintmask & (1L<<irqoffs);
  63. pinstate = s3c_gpio_getcfg(pin);
  64. if (!irqstate) {
  65. if (pinstate == S3C2410_GPIO_IRQ)
  66. S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin);
  67. } else {
  68. if (pinstate == S3C2410_GPIO_IRQ) {
  69. S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin);
  70. s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT);
  71. }
  72. }
  73. }
  74. /* s3c_pm_configure_extint
  75. *
  76. * configure all external interrupt pins
  77. */
  78. void s3c_pm_configure_extint(void)
  79. {
  80. int pin;
  81. /* for each of the external interrupts (EINT0..EINT15) we
  82. * need to check whether it is an external interrupt source,
  83. * and then configure it as an input if it is not
  84. */
  85. for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) {
  86. s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0));
  87. }
  88. for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) {
  89. s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG(0))+8);
  90. }
  91. }
  92. #ifdef CONFIG_PM_SLEEP
  93. void s3c_pm_restore_core(void)
  94. {
  95. s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
  96. }
  97. void s3c_pm_save_core(void)
  98. {
  99. s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
  100. }
  101. #endif