osiris.h 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright 2005 Simtec Electronics
  4. * http://www.simtec.co.uk/products/
  5. * Ben Dooks <[email protected]>
  6. *
  7. * OSIRIS - CPLD control constants
  8. * OSIRIS - Memory map definitions
  9. */
  10. #ifndef __MACH_S3C24XX_OSIRIS_H
  11. #define __MACH_S3C24XX_OSIRIS_H __FILE__
  12. /* CTRL0 - NAND WP control */
  13. #define OSIRIS_CTRL0_NANDSEL (0x3)
  14. #define OSIRIS_CTRL0_BOOT_INT (1<<3)
  15. #define OSIRIS_CTRL0_PCMCIA (1<<4)
  16. #define OSIRIS_CTRL0_FIX8 (1<<5)
  17. #define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6)
  18. #define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7)
  19. #define OSIRIS_CTRL1_FIX8 (1<<0)
  20. #define OSIRIS_ID_REVMASK (0x7)
  21. /* start peripherals off after the S3C2410 */
  22. #define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000))
  23. #define OSIRIS_PA_CPLD (S3C2410_CS1 | (1<<26))
  24. /* we put the CPLD registers next, to get them out of the way */
  25. #define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000)
  26. #define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD)
  27. #define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000)
  28. #define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23))
  29. #define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000)
  30. #define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23))
  31. #define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000)
  32. #define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23))
  33. #define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000)
  34. #define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23))
  35. #endif /* __MACH_S3C24XX_OSIRIS_H */