mach-qt2410.c 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // Copyright (C) 2006 by OpenMoko, Inc.
  4. // Author: Harald Welte <[email protected]>
  5. // All rights reserved.
  6. #include <linux/kernel.h>
  7. #include <linux/types.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/list.h>
  10. #include <linux/timer.h>
  11. #include <linux/init.h>
  12. #include <linux/gpio.h>
  13. #include <linux/gpio/machine.h>
  14. #include <linux/device.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/serial_core.h>
  17. #include <linux/serial_s3c.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/spi_gpio.h>
  20. #include <linux/io.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/rawnand.h>
  23. #include <linux/mtd/nand-ecc-sw-hamming.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/mach/map.h>
  27. #include <asm/mach/irq.h>
  28. #include <asm/irq.h>
  29. #include <asm/mach-types.h>
  30. #include <linux/platform_data/leds-s3c24xx.h>
  31. #include <linux/platform_data/fb-s3c2410.h>
  32. #include <linux/platform_data/mtd-nand-s3c2410.h>
  33. #include <linux/platform_data/usb-s3c2410_udc.h>
  34. #include <linux/platform_data/i2c-s3c2410.h>
  35. #include "gpio-samsung.h"
  36. #include "gpio-cfg.h"
  37. #include "devs.h"
  38. #include "cpu.h"
  39. #include "pm.h"
  40. #include "s3c24xx.h"
  41. #include "common-smdk-s3c24xx.h"
  42. static struct map_desc qt2410_iodesc[] __initdata = {
  43. { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
  44. };
  45. #define UCON S3C2410_UCON_DEFAULT
  46. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  47. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  48. static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
  49. [0] = {
  50. .hwport = 0,
  51. .flags = 0,
  52. .ucon = UCON,
  53. .ulcon = ULCON,
  54. .ufcon = UFCON,
  55. },
  56. [1] = {
  57. .hwport = 1,
  58. .flags = 0,
  59. .ucon = UCON,
  60. .ulcon = ULCON,
  61. .ufcon = UFCON,
  62. },
  63. [2] = {
  64. .hwport = 2,
  65. .flags = 0,
  66. .ucon = UCON,
  67. .ulcon = ULCON,
  68. .ufcon = UFCON,
  69. }
  70. };
  71. /* LCD driver info */
  72. static struct s3c2410fb_display qt2410_lcd_cfg[] __initdata = {
  73. {
  74. /* Configuration for 640x480 SHARP LQ080V3DG01 */
  75. .lcdcon5 = S3C2410_LCDCON5_FRM565 |
  76. S3C2410_LCDCON5_INVVLINE |
  77. S3C2410_LCDCON5_INVVFRAME |
  78. S3C2410_LCDCON5_PWREN |
  79. S3C2410_LCDCON5_HWSWP,
  80. .type = S3C2410_LCDCON1_TFT,
  81. .width = 640,
  82. .height = 480,
  83. .pixclock = 40000, /* HCLK/4 */
  84. .xres = 640,
  85. .yres = 480,
  86. .bpp = 16,
  87. .left_margin = 44,
  88. .right_margin = 116,
  89. .hsync_len = 96,
  90. .upper_margin = 19,
  91. .lower_margin = 11,
  92. .vsync_len = 15,
  93. },
  94. {
  95. /* Configuration for 480x640 toppoly TD028TTEC1 */
  96. .lcdcon5 = S3C2410_LCDCON5_FRM565 |
  97. S3C2410_LCDCON5_INVVLINE |
  98. S3C2410_LCDCON5_INVVFRAME |
  99. S3C2410_LCDCON5_PWREN |
  100. S3C2410_LCDCON5_HWSWP,
  101. .type = S3C2410_LCDCON1_TFT,
  102. .width = 480,
  103. .height = 640,
  104. .pixclock = 40000, /* HCLK/4 */
  105. .xres = 480,
  106. .yres = 640,
  107. .bpp = 16,
  108. .left_margin = 8,
  109. .right_margin = 24,
  110. .hsync_len = 8,
  111. .upper_margin = 2,
  112. .lower_margin = 4,
  113. .vsync_len = 2,
  114. },
  115. {
  116. /* Config for 240x320 LCD */
  117. .lcdcon5 = S3C2410_LCDCON5_FRM565 |
  118. S3C2410_LCDCON5_INVVLINE |
  119. S3C2410_LCDCON5_INVVFRAME |
  120. S3C2410_LCDCON5_PWREN |
  121. S3C2410_LCDCON5_HWSWP,
  122. .type = S3C2410_LCDCON1_TFT,
  123. .width = 240,
  124. .height = 320,
  125. .pixclock = 100000, /* HCLK/10 */
  126. .xres = 240,
  127. .yres = 320,
  128. .bpp = 16,
  129. .left_margin = 13,
  130. .right_margin = 8,
  131. .hsync_len = 4,
  132. .upper_margin = 2,
  133. .lower_margin = 7,
  134. .vsync_len = 4,
  135. },
  136. };
  137. static struct s3c2410fb_mach_info qt2410_fb_info __initdata = {
  138. .displays = qt2410_lcd_cfg,
  139. .num_displays = ARRAY_SIZE(qt2410_lcd_cfg),
  140. .default_display = 0,
  141. .lpcsel = ((0xCE6) & ~7) | 1<<4,
  142. };
  143. /* CS8900 */
  144. static struct resource qt2410_cs89x0_resources[] = {
  145. [0] = DEFINE_RES_MEM(0x19000000, 17),
  146. [1] = DEFINE_RES_IRQ(IRQ_EINT9),
  147. };
  148. static struct platform_device qt2410_cs89x0 = {
  149. .name = "cirrus-cs89x0",
  150. .num_resources = ARRAY_SIZE(qt2410_cs89x0_resources),
  151. .resource = qt2410_cs89x0_resources,
  152. };
  153. /* LED */
  154. static struct gpiod_lookup_table qt2410_led_gpio_table = {
  155. .dev_id = "s3c24xx_led.0",
  156. .table = {
  157. GPIO_LOOKUP("GPB", 0, NULL, GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN),
  158. { },
  159. },
  160. };
  161. static struct s3c24xx_led_platdata qt2410_pdata_led = {
  162. .name = "led",
  163. .def_trigger = "timer",
  164. };
  165. static struct platform_device qt2410_led = {
  166. .name = "s3c24xx_led",
  167. .id = 0,
  168. .dev = {
  169. .platform_data = &qt2410_pdata_led,
  170. },
  171. };
  172. /* SPI */
  173. static struct spi_gpio_platform_data spi_gpio_cfg = {
  174. .num_chipselect = 1,
  175. };
  176. static struct platform_device qt2410_spi = {
  177. .name = "spi_gpio",
  178. .id = 1,
  179. .dev.platform_data = &spi_gpio_cfg,
  180. };
  181. static struct gpiod_lookup_table qt2410_spi_gpiod_table = {
  182. .dev_id = "spi_gpio",
  183. .table = {
  184. GPIO_LOOKUP("GPIOG", 7,
  185. "sck", GPIO_ACTIVE_HIGH),
  186. GPIO_LOOKUP("GPIOG", 6,
  187. "mosi", GPIO_ACTIVE_HIGH),
  188. GPIO_LOOKUP("GPIOG", 5,
  189. "miso", GPIO_ACTIVE_HIGH),
  190. GPIO_LOOKUP("GPIOB", 5,
  191. "cs", GPIO_ACTIVE_HIGH),
  192. { },
  193. },
  194. };
  195. static struct gpiod_lookup_table qt2410_mmc_gpiod_table = {
  196. .dev_id = "s3c2410-sdi",
  197. .table = {
  198. /* bus pins */
  199. GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH),
  200. GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH),
  201. GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH),
  202. GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH),
  203. GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH),
  204. GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH),
  205. { },
  206. },
  207. };
  208. /* Board devices */
  209. static struct platform_device *qt2410_devices[] __initdata = {
  210. &s3c_device_ohci,
  211. &s3c_device_lcd,
  212. &s3c_device_wdt,
  213. &s3c_device_i2c0,
  214. &s3c_device_iis,
  215. &s3c_device_sdi,
  216. &s3c_device_usbgadget,
  217. &qt2410_spi,
  218. &qt2410_cs89x0,
  219. &qt2410_led,
  220. };
  221. static struct mtd_partition __initdata qt2410_nand_part[] = {
  222. [0] = {
  223. .name = "U-Boot",
  224. .size = 0x30000,
  225. .offset = 0,
  226. },
  227. [1] = {
  228. .name = "U-Boot environment",
  229. .offset = 0x30000,
  230. .size = 0x4000,
  231. },
  232. [2] = {
  233. .name = "kernel",
  234. .offset = 0x34000,
  235. .size = SZ_2M,
  236. },
  237. [3] = {
  238. .name = "initrd",
  239. .offset = 0x234000,
  240. .size = SZ_4M,
  241. },
  242. [4] = {
  243. .name = "jffs2",
  244. .offset = 0x634000,
  245. .size = 0x39cc000,
  246. },
  247. };
  248. static struct s3c2410_nand_set __initdata qt2410_nand_sets[] = {
  249. [0] = {
  250. .name = "NAND",
  251. .nr_chips = 1,
  252. .nr_partitions = ARRAY_SIZE(qt2410_nand_part),
  253. .partitions = qt2410_nand_part,
  254. },
  255. };
  256. /* choose a set of timings which should suit most 512Mbit
  257. * chips and beyond.
  258. */
  259. static struct s3c2410_platform_nand __initdata qt2410_nand_info = {
  260. .tacls = 20,
  261. .twrph0 = 60,
  262. .twrph1 = 20,
  263. .nr_sets = ARRAY_SIZE(qt2410_nand_sets),
  264. .sets = qt2410_nand_sets,
  265. .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
  266. };
  267. /* UDC */
  268. static struct s3c2410_udc_mach_info qt2410_udc_cfg = {
  269. };
  270. static char tft_type = 's';
  271. static int __init qt2410_tft_setup(char *str)
  272. {
  273. tft_type = str[0];
  274. return 1;
  275. }
  276. __setup("tft=", qt2410_tft_setup);
  277. static void __init qt2410_map_io(void)
  278. {
  279. s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc));
  280. s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
  281. s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
  282. }
  283. static void __init qt2410_init_time(void)
  284. {
  285. s3c2410_init_clocks(12000000);
  286. s3c24xx_timer_init();
  287. }
  288. static void __init qt2410_machine_init(void)
  289. {
  290. s3c_nand_set_platdata(&qt2410_nand_info);
  291. switch (tft_type) {
  292. case 'p': /* production */
  293. qt2410_fb_info.default_display = 1;
  294. break;
  295. case 'b': /* big */
  296. qt2410_fb_info.default_display = 0;
  297. break;
  298. case 's': /* small */
  299. default:
  300. qt2410_fb_info.default_display = 2;
  301. break;
  302. }
  303. s3c24xx_fb_set_platdata(&qt2410_fb_info);
  304. /* set initial state of the LED GPIO */
  305. WARN_ON(gpio_request_one(S3C2410_GPB(0), GPIOF_OUT_INIT_HIGH, NULL));
  306. gpio_free(S3C2410_GPB(0));
  307. s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
  308. s3c_i2c0_set_platdata(NULL);
  309. /* Configure the I2S pins (GPE0...GPE4) in correct mode */
  310. s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
  311. S3C_GPIO_PULL_NONE);
  312. gpiod_add_lookup_table(&qt2410_spi_gpiod_table);
  313. s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE);
  314. gpiod_add_lookup_table(&qt2410_led_gpio_table);
  315. gpiod_add_lookup_table(&qt2410_mmc_gpiod_table);
  316. platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
  317. s3c_pm_init();
  318. }
  319. MACHINE_START(QT2410, "QT2410")
  320. .atag_offset = 0x100,
  321. .nr_irqs = NR_IRQS_S3C2410,
  322. .map_io = qt2410_map_io,
  323. .init_irq = s3c2410_init_irq,
  324. .init_machine = qt2410_machine_init,
  325. .init_time = qt2410_init_time,
  326. MACHINE_END