devs.c 27 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. // http://www.samsung.com
  5. //
  6. // Base Samsung platform device definitions
  7. #include <linux/gpio.h>
  8. #include <linux/kernel.h>
  9. #include <linux/types.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/list.h>
  12. #include <linux/timer.h>
  13. #include <linux/init.h>
  14. #include <linux/serial_core.h>
  15. #include <linux/serial_s3c.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/io.h>
  18. #include <linux/slab.h>
  19. #include <linux/string.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/fb.h>
  22. #include <linux/gfp.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/onenand.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/mmc/host.h>
  27. #include <linux/ioport.h>
  28. #include <linux/sizes.h>
  29. #include <linux/platform_data/s3c-hsudc.h>
  30. #include <linux/platform_data/s3c-hsotg.h>
  31. #include <linux/platform_data/dma-s3c24xx.h>
  32. #include <linux/platform_data/media/s5p_hdmi.h>
  33. #include <asm/irq.h>
  34. #include <asm/mach/arch.h>
  35. #include <asm/mach/map.h>
  36. #include <asm/mach/irq.h>
  37. #include "irqs.h"
  38. #include "map.h"
  39. #include "gpio-samsung.h"
  40. #include "gpio-cfg.h"
  41. #ifdef CONFIG_PLAT_S3C24XX
  42. #include "regs-s3c2443-clock.h"
  43. #endif /* CONFIG_PLAT_S3C24XX */
  44. #include "cpu.h"
  45. #include "devs.h"
  46. #include <linux/soc/samsung/s3c-adc.h>
  47. #include <linux/platform_data/ata-samsung_cf.h>
  48. #include "fb.h"
  49. #include <linux/platform_data/fb-s3c2410.h>
  50. #include <linux/platform_data/hwmon-s3c.h>
  51. #include <linux/platform_data/i2c-s3c2410.h>
  52. #include "keypad.h"
  53. #include <linux/platform_data/mmc-s3cmci.h>
  54. #include <linux/platform_data/mtd-nand-s3c2410.h>
  55. #include "pwm-core.h"
  56. #include "sdhci.h"
  57. #include <linux/platform_data/touchscreen-s3c2410.h>
  58. #include <linux/platform_data/usb-s3c2410_udc.h>
  59. #include <linux/platform_data/usb-ohci-s3c2410.h>
  60. #include "usb-phy.h"
  61. #include <linux/platform_data/asoc-s3c.h>
  62. #include <linux/platform_data/spi-s3c64xx.h>
  63. #define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
  64. /* AC97 */
  65. #ifdef CONFIG_CPU_S3C2440
  66. static struct resource s3c_ac97_resource[] = {
  67. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  68. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  69. };
  70. struct platform_device s3c_device_ac97 = {
  71. .name = "samsung-ac97",
  72. .id = -1,
  73. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  74. .resource = s3c_ac97_resource,
  75. .dev = {
  76. .dma_mask = &samsung_device_dma_mask,
  77. .coherent_dma_mask = DMA_BIT_MASK(32),
  78. }
  79. };
  80. #endif /* CONFIG_CPU_S3C2440 */
  81. /* ADC */
  82. #ifdef CONFIG_PLAT_S3C24XX
  83. static struct resource s3c_adc_resource[] = {
  84. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  85. [1] = DEFINE_RES_IRQ(IRQ_TC),
  86. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  87. };
  88. struct platform_device s3c_device_adc = {
  89. .name = "s3c24xx-adc",
  90. .id = -1,
  91. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  92. .resource = s3c_adc_resource,
  93. };
  94. #endif /* CONFIG_PLAT_S3C24XX */
  95. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  96. static struct resource s3c_adc_resource[] = {
  97. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  98. [1] = DEFINE_RES_IRQ(IRQ_ADC),
  99. [2] = DEFINE_RES_IRQ(IRQ_TC),
  100. };
  101. struct platform_device s3c_device_adc = {
  102. .name = "exynos-adc",
  103. .id = -1,
  104. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  105. .resource = s3c_adc_resource,
  106. };
  107. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  108. /* Camif Controller */
  109. #ifdef CONFIG_CPU_S3C2440
  110. static struct resource s3c_camif_resource[] = {
  111. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  112. [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
  113. [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
  114. };
  115. struct platform_device s3c_device_camif = {
  116. .name = "s3c2440-camif",
  117. .id = -1,
  118. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  119. .resource = s3c_camif_resource,
  120. .dev = {
  121. .dma_mask = &samsung_device_dma_mask,
  122. .coherent_dma_mask = DMA_BIT_MASK(32),
  123. }
  124. };
  125. #endif /* CONFIG_CPU_S3C2440 */
  126. /* FB */
  127. #ifdef CONFIG_S3C_DEV_FB
  128. static struct resource s3c_fb_resource[] = {
  129. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  130. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  131. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  132. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  133. };
  134. struct platform_device s3c_device_fb = {
  135. .name = "s3c-fb",
  136. .id = -1,
  137. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  138. .resource = s3c_fb_resource,
  139. .dev = {
  140. .dma_mask = &samsung_device_dma_mask,
  141. .coherent_dma_mask = DMA_BIT_MASK(32),
  142. },
  143. };
  144. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  145. {
  146. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  147. &s3c_device_fb);
  148. }
  149. #endif /* CONFIG_S3C_DEV_FB */
  150. /* HWMON */
  151. #ifdef CONFIG_S3C_DEV_HWMON
  152. struct platform_device s3c_device_hwmon = {
  153. .name = "s3c-hwmon",
  154. .id = -1,
  155. .dev.parent = &s3c_device_adc.dev,
  156. };
  157. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  158. {
  159. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  160. &s3c_device_hwmon);
  161. }
  162. #endif /* CONFIG_S3C_DEV_HWMON */
  163. /* HSMMC */
  164. #ifdef CONFIG_S3C_DEV_HSMMC
  165. static struct resource s3c_hsmmc_resource[] = {
  166. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  167. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  168. };
  169. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  170. .max_width = 4,
  171. .host_caps = (MMC_CAP_4_BIT_DATA |
  172. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  173. };
  174. struct platform_device s3c_device_hsmmc0 = {
  175. .name = "s3c-sdhci",
  176. .id = 0,
  177. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  178. .resource = s3c_hsmmc_resource,
  179. .dev = {
  180. .dma_mask = &samsung_device_dma_mask,
  181. .coherent_dma_mask = DMA_BIT_MASK(32),
  182. .platform_data = &s3c_hsmmc0_def_platdata,
  183. },
  184. };
  185. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  186. {
  187. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  188. }
  189. #endif /* CONFIG_S3C_DEV_HSMMC */
  190. #ifdef CONFIG_S3C_DEV_HSMMC1
  191. static struct resource s3c_hsmmc1_resource[] = {
  192. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  193. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  194. };
  195. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  196. .max_width = 4,
  197. .host_caps = (MMC_CAP_4_BIT_DATA |
  198. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  199. };
  200. struct platform_device s3c_device_hsmmc1 = {
  201. .name = "s3c-sdhci",
  202. .id = 1,
  203. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  204. .resource = s3c_hsmmc1_resource,
  205. .dev = {
  206. .dma_mask = &samsung_device_dma_mask,
  207. .coherent_dma_mask = DMA_BIT_MASK(32),
  208. .platform_data = &s3c_hsmmc1_def_platdata,
  209. },
  210. };
  211. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  212. {
  213. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  214. }
  215. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  216. /* HSMMC2 */
  217. #ifdef CONFIG_S3C_DEV_HSMMC2
  218. static struct resource s3c_hsmmc2_resource[] = {
  219. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  220. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  221. };
  222. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  223. .max_width = 4,
  224. .host_caps = (MMC_CAP_4_BIT_DATA |
  225. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  226. };
  227. struct platform_device s3c_device_hsmmc2 = {
  228. .name = "s3c-sdhci",
  229. .id = 2,
  230. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  231. .resource = s3c_hsmmc2_resource,
  232. .dev = {
  233. .dma_mask = &samsung_device_dma_mask,
  234. .coherent_dma_mask = DMA_BIT_MASK(32),
  235. .platform_data = &s3c_hsmmc2_def_platdata,
  236. },
  237. };
  238. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  239. {
  240. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  241. }
  242. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  243. #ifdef CONFIG_S3C_DEV_HSMMC3
  244. static struct resource s3c_hsmmc3_resource[] = {
  245. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  246. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  247. };
  248. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  249. .max_width = 4,
  250. .host_caps = (MMC_CAP_4_BIT_DATA |
  251. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  252. };
  253. struct platform_device s3c_device_hsmmc3 = {
  254. .name = "s3c-sdhci",
  255. .id = 3,
  256. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  257. .resource = s3c_hsmmc3_resource,
  258. .dev = {
  259. .dma_mask = &samsung_device_dma_mask,
  260. .coherent_dma_mask = DMA_BIT_MASK(32),
  261. .platform_data = &s3c_hsmmc3_def_platdata,
  262. },
  263. };
  264. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  265. {
  266. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  267. }
  268. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  269. /* I2C */
  270. static struct resource s3c_i2c0_resource[] = {
  271. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  272. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  273. };
  274. struct platform_device s3c_device_i2c0 = {
  275. .name = "s3c2410-i2c",
  276. .id = 0,
  277. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  278. .resource = s3c_i2c0_resource,
  279. };
  280. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  281. .flags = 0,
  282. .slave_addr = 0x10,
  283. .frequency = 100*1000,
  284. .sda_delay = 100,
  285. };
  286. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  287. {
  288. struct s3c2410_platform_i2c *npd;
  289. if (!pd) {
  290. pd = &default_i2c_data;
  291. pd->bus_num = 0;
  292. }
  293. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c0);
  294. if (!npd->cfg_gpio)
  295. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  296. }
  297. #ifdef CONFIG_S3C_DEV_I2C1
  298. static struct resource s3c_i2c1_resource[] = {
  299. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  300. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  301. };
  302. struct platform_device s3c_device_i2c1 = {
  303. .name = "s3c2410-i2c",
  304. .id = 1,
  305. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  306. .resource = s3c_i2c1_resource,
  307. };
  308. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  309. {
  310. struct s3c2410_platform_i2c *npd;
  311. if (!pd) {
  312. pd = &default_i2c_data;
  313. pd->bus_num = 1;
  314. }
  315. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c1);
  316. if (!npd->cfg_gpio)
  317. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  318. }
  319. #endif /* CONFIG_S3C_DEV_I2C1 */
  320. #ifdef CONFIG_S3C_DEV_I2C2
  321. static struct resource s3c_i2c2_resource[] = {
  322. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  323. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  324. };
  325. struct platform_device s3c_device_i2c2 = {
  326. .name = "s3c2410-i2c",
  327. .id = 2,
  328. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  329. .resource = s3c_i2c2_resource,
  330. };
  331. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  332. {
  333. struct s3c2410_platform_i2c *npd;
  334. if (!pd) {
  335. pd = &default_i2c_data;
  336. pd->bus_num = 2;
  337. }
  338. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c2);
  339. if (!npd->cfg_gpio)
  340. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  341. }
  342. #endif /* CONFIG_S3C_DEV_I2C2 */
  343. #ifdef CONFIG_S3C_DEV_I2C3
  344. static struct resource s3c_i2c3_resource[] = {
  345. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  346. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  347. };
  348. struct platform_device s3c_device_i2c3 = {
  349. .name = "s3c2440-i2c",
  350. .id = 3,
  351. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  352. .resource = s3c_i2c3_resource,
  353. };
  354. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  355. {
  356. struct s3c2410_platform_i2c *npd;
  357. if (!pd) {
  358. pd = &default_i2c_data;
  359. pd->bus_num = 3;
  360. }
  361. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c3);
  362. if (!npd->cfg_gpio)
  363. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  364. }
  365. #endif /*CONFIG_S3C_DEV_I2C3 */
  366. #ifdef CONFIG_S3C_DEV_I2C4
  367. static struct resource s3c_i2c4_resource[] = {
  368. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  369. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  370. };
  371. struct platform_device s3c_device_i2c4 = {
  372. .name = "s3c2440-i2c",
  373. .id = 4,
  374. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  375. .resource = s3c_i2c4_resource,
  376. };
  377. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  378. {
  379. struct s3c2410_platform_i2c *npd;
  380. if (!pd) {
  381. pd = &default_i2c_data;
  382. pd->bus_num = 4;
  383. }
  384. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c4);
  385. if (!npd->cfg_gpio)
  386. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  387. }
  388. #endif /*CONFIG_S3C_DEV_I2C4 */
  389. #ifdef CONFIG_S3C_DEV_I2C5
  390. static struct resource s3c_i2c5_resource[] = {
  391. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  392. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  393. };
  394. struct platform_device s3c_device_i2c5 = {
  395. .name = "s3c2440-i2c",
  396. .id = 5,
  397. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  398. .resource = s3c_i2c5_resource,
  399. };
  400. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  401. {
  402. struct s3c2410_platform_i2c *npd;
  403. if (!pd) {
  404. pd = &default_i2c_data;
  405. pd->bus_num = 5;
  406. }
  407. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c5);
  408. if (!npd->cfg_gpio)
  409. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  410. }
  411. #endif /*CONFIG_S3C_DEV_I2C5 */
  412. #ifdef CONFIG_S3C_DEV_I2C6
  413. static struct resource s3c_i2c6_resource[] = {
  414. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  415. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  416. };
  417. struct platform_device s3c_device_i2c6 = {
  418. .name = "s3c2440-i2c",
  419. .id = 6,
  420. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  421. .resource = s3c_i2c6_resource,
  422. };
  423. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  424. {
  425. struct s3c2410_platform_i2c *npd;
  426. if (!pd) {
  427. pd = &default_i2c_data;
  428. pd->bus_num = 6;
  429. }
  430. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c6);
  431. if (!npd->cfg_gpio)
  432. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  433. }
  434. #endif /* CONFIG_S3C_DEV_I2C6 */
  435. #ifdef CONFIG_S3C_DEV_I2C7
  436. static struct resource s3c_i2c7_resource[] = {
  437. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  438. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  439. };
  440. struct platform_device s3c_device_i2c7 = {
  441. .name = "s3c2440-i2c",
  442. .id = 7,
  443. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  444. .resource = s3c_i2c7_resource,
  445. };
  446. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  447. {
  448. struct s3c2410_platform_i2c *npd;
  449. if (!pd) {
  450. pd = &default_i2c_data;
  451. pd->bus_num = 7;
  452. }
  453. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c7);
  454. if (!npd->cfg_gpio)
  455. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  456. }
  457. #endif /* CONFIG_S3C_DEV_I2C7 */
  458. /* I2S */
  459. #ifdef CONFIG_PLAT_S3C24XX
  460. static struct resource s3c_iis_resource[] = {
  461. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  462. };
  463. struct platform_device s3c_device_iis = {
  464. .name = "s3c24xx-iis",
  465. .id = -1,
  466. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  467. .resource = s3c_iis_resource,
  468. .dev = {
  469. .dma_mask = &samsung_device_dma_mask,
  470. .coherent_dma_mask = DMA_BIT_MASK(32),
  471. }
  472. };
  473. #endif /* CONFIG_PLAT_S3C24XX */
  474. /* IDE CFCON */
  475. #ifdef CONFIG_SAMSUNG_DEV_IDE
  476. static struct resource s3c_cfcon_resource[] = {
  477. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  478. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  479. };
  480. struct platform_device s3c_device_cfcon = {
  481. .id = 0,
  482. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  483. .resource = s3c_cfcon_resource,
  484. };
  485. void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  486. {
  487. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  488. &s3c_device_cfcon);
  489. }
  490. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  491. /* KEYPAD */
  492. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  493. static struct resource samsung_keypad_resources[] = {
  494. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  495. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  496. };
  497. struct platform_device samsung_device_keypad = {
  498. .name = "samsung-keypad",
  499. .id = -1,
  500. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  501. .resource = samsung_keypad_resources,
  502. };
  503. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  504. {
  505. struct samsung_keypad_platdata *npd;
  506. npd = s3c_set_platdata(pd, sizeof(*npd), &samsung_device_keypad);
  507. if (!npd->cfg_gpio)
  508. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  509. }
  510. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  511. /* LCD Controller */
  512. #ifdef CONFIG_PLAT_S3C24XX
  513. static struct resource s3c_lcd_resource[] = {
  514. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  515. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  516. };
  517. struct platform_device s3c_device_lcd = {
  518. .name = "s3c2410-lcd",
  519. .id = -1,
  520. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  521. .resource = s3c_lcd_resource,
  522. .dev = {
  523. .dma_mask = &samsung_device_dma_mask,
  524. .coherent_dma_mask = DMA_BIT_MASK(32),
  525. }
  526. };
  527. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  528. {
  529. struct s3c2410fb_mach_info *npd;
  530. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  531. if (npd) {
  532. npd->displays = kmemdup(pd->displays,
  533. sizeof(struct s3c2410fb_display) * npd->num_displays,
  534. GFP_KERNEL);
  535. if (!npd->displays)
  536. printk(KERN_ERR "no memory for LCD display data\n");
  537. } else {
  538. printk(KERN_ERR "no memory for LCD platform data\n");
  539. }
  540. }
  541. #endif /* CONFIG_PLAT_S3C24XX */
  542. /* NAND */
  543. #ifdef CONFIG_S3C_DEV_NAND
  544. static struct resource s3c_nand_resource[] = {
  545. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  546. };
  547. struct platform_device s3c_device_nand = {
  548. .name = "s3c2410-nand",
  549. .id = -1,
  550. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  551. .resource = s3c_nand_resource,
  552. };
  553. /*
  554. * s3c_nand_copy_set() - copy nand set data
  555. * @set: The new structure, directly copied from the old.
  556. *
  557. * Copy all the fields from the NAND set field from what is probably __initdata
  558. * to new kernel memory. The code returns 0 if the copy happened correctly or
  559. * an error code for the calling function to display.
  560. *
  561. * Note, we currently do not try and look to see if we've already copied the
  562. * data in a previous set.
  563. */
  564. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  565. {
  566. void *ptr;
  567. int size;
  568. size = sizeof(struct mtd_partition) * set->nr_partitions;
  569. if (size) {
  570. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  571. set->partitions = ptr;
  572. if (!ptr)
  573. return -ENOMEM;
  574. }
  575. if (set->nr_map && set->nr_chips) {
  576. size = sizeof(int) * set->nr_chips;
  577. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  578. set->nr_map = ptr;
  579. if (!ptr)
  580. return -ENOMEM;
  581. }
  582. return 0;
  583. }
  584. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  585. {
  586. struct s3c2410_platform_nand *npd;
  587. int size;
  588. int ret;
  589. /* note, if we get a failure in allocation, we simply drop out of the
  590. * function. If there is so little memory available at initialisation
  591. * time then there is little chance the system is going to run.
  592. */
  593. npd = s3c_set_platdata(nand, sizeof(*npd), &s3c_device_nand);
  594. if (!npd)
  595. return;
  596. /* now see if we need to copy any of the nand set data */
  597. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  598. if (size) {
  599. struct s3c2410_nand_set *from = npd->sets;
  600. struct s3c2410_nand_set *to;
  601. int i;
  602. to = kmemdup(from, size, GFP_KERNEL);
  603. npd->sets = to; /* set, even if we failed */
  604. if (!to) {
  605. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  606. return;
  607. }
  608. for (i = 0; i < npd->nr_sets; i++) {
  609. ret = s3c_nand_copy_set(to);
  610. if (ret) {
  611. printk(KERN_ERR "%s: failed to copy set %d\n",
  612. __func__, i);
  613. return;
  614. }
  615. to++;
  616. }
  617. }
  618. }
  619. #endif /* CONFIG_S3C_DEV_NAND */
  620. /* ONENAND */
  621. #ifdef CONFIG_S3C_DEV_ONENAND
  622. static struct resource s3c_onenand_resources[] = {
  623. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  624. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  625. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  626. };
  627. struct platform_device s3c_device_onenand = {
  628. .name = "samsung-onenand",
  629. .id = 0,
  630. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  631. .resource = s3c_onenand_resources,
  632. };
  633. #endif /* CONFIG_S3C_DEV_ONENAND */
  634. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  635. static struct resource s3c64xx_onenand1_resources[] = {
  636. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  637. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  638. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  639. };
  640. struct platform_device s3c64xx_device_onenand1 = {
  641. .name = "samsung-onenand",
  642. .id = 1,
  643. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  644. .resource = s3c64xx_onenand1_resources,
  645. };
  646. void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  647. {
  648. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  649. &s3c64xx_device_onenand1);
  650. }
  651. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  652. /* PWM Timer */
  653. #ifdef CONFIG_SAMSUNG_DEV_PWM
  654. static struct resource samsung_pwm_resource[] = {
  655. DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
  656. };
  657. struct platform_device samsung_device_pwm = {
  658. .name = "samsung-pwm",
  659. .id = -1,
  660. .num_resources = ARRAY_SIZE(samsung_pwm_resource),
  661. .resource = samsung_pwm_resource,
  662. };
  663. void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
  664. {
  665. samsung_device_pwm.dev.platform_data = pd;
  666. }
  667. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  668. /* RTC */
  669. #ifdef CONFIG_PLAT_S3C24XX
  670. static struct resource s3c_rtc_resource[] = {
  671. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  672. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  673. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  674. };
  675. struct platform_device s3c_device_rtc = {
  676. .name = "s3c2410-rtc",
  677. .id = -1,
  678. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  679. .resource = s3c_rtc_resource,
  680. };
  681. #endif /* CONFIG_PLAT_S3C24XX */
  682. #ifdef CONFIG_S3C_DEV_RTC
  683. static struct resource s3c_rtc_resource[] = {
  684. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  685. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  686. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  687. };
  688. struct platform_device s3c_device_rtc = {
  689. .name = "s3c64xx-rtc",
  690. .id = -1,
  691. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  692. .resource = s3c_rtc_resource,
  693. };
  694. #endif /* CONFIG_S3C_DEV_RTC */
  695. /* SDI */
  696. #ifdef CONFIG_PLAT_S3C24XX
  697. void s3c24xx_mci_def_set_power(unsigned char power_mode, unsigned short vdd)
  698. {
  699. switch (power_mode) {
  700. case MMC_POWER_ON:
  701. case MMC_POWER_UP:
  702. /* Configure GPE5...GPE10 pins in SD mode */
  703. s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2),
  704. S3C_GPIO_PULL_NONE);
  705. break;
  706. case MMC_POWER_OFF:
  707. default:
  708. gpio_direction_output(S3C2410_GPE(5), 0);
  709. break;
  710. }
  711. }
  712. static struct resource s3c_sdi_resource[] = {
  713. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  714. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  715. };
  716. static struct s3c24xx_mci_pdata s3cmci_def_pdata = {
  717. /* This is currently here to avoid a number of if (host->pdata)
  718. * checks. Any zero fields to ensure reasonable defaults are picked. */
  719. .no_wprotect = 1,
  720. .no_detect = 1,
  721. .set_power = s3c24xx_mci_def_set_power,
  722. };
  723. struct platform_device s3c_device_sdi = {
  724. .name = "s3c2410-sdi",
  725. .id = -1,
  726. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  727. .resource = s3c_sdi_resource,
  728. .dev.platform_data = &s3cmci_def_pdata,
  729. };
  730. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  731. {
  732. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  733. &s3c_device_sdi);
  734. }
  735. #endif /* CONFIG_PLAT_S3C24XX */
  736. /* SPI */
  737. #ifdef CONFIG_PLAT_S3C24XX
  738. static struct resource s3c_spi0_resource[] = {
  739. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  740. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  741. };
  742. struct platform_device s3c_device_spi0 = {
  743. .name = "s3c2410-spi",
  744. .id = 0,
  745. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  746. .resource = s3c_spi0_resource,
  747. .dev = {
  748. .dma_mask = &samsung_device_dma_mask,
  749. .coherent_dma_mask = DMA_BIT_MASK(32),
  750. }
  751. };
  752. static struct resource s3c_spi1_resource[] = {
  753. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  754. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  755. };
  756. struct platform_device s3c_device_spi1 = {
  757. .name = "s3c2410-spi",
  758. .id = 1,
  759. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  760. .resource = s3c_spi1_resource,
  761. .dev = {
  762. .dma_mask = &samsung_device_dma_mask,
  763. .coherent_dma_mask = DMA_BIT_MASK(32),
  764. }
  765. };
  766. #endif /* CONFIG_PLAT_S3C24XX */
  767. /* Touchscreen */
  768. #ifdef CONFIG_PLAT_S3C24XX
  769. static struct resource s3c_ts_resource[] = {
  770. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  771. [1] = DEFINE_RES_IRQ(IRQ_TC),
  772. };
  773. struct platform_device s3c_device_ts = {
  774. .name = "s3c2410-ts",
  775. .id = -1,
  776. .dev.parent = &s3c_device_adc.dev,
  777. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  778. .resource = s3c_ts_resource,
  779. };
  780. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  781. {
  782. s3c_set_platdata(hard_s3c2410ts_info,
  783. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  784. }
  785. #endif /* CONFIG_PLAT_S3C24XX */
  786. #ifdef CONFIG_SAMSUNG_DEV_TS
  787. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  788. .delay = 10000,
  789. .presc = 49,
  790. .oversampling_shift = 2,
  791. };
  792. void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  793. {
  794. if (!pd)
  795. pd = &default_ts_data;
  796. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  797. &s3c_device_adc);
  798. }
  799. #endif /* CONFIG_SAMSUNG_DEV_TS */
  800. /* USB */
  801. #ifdef CONFIG_S3C_DEV_USB_HOST
  802. static struct resource s3c_usb_resource[] = {
  803. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  804. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  805. };
  806. struct platform_device s3c_device_ohci = {
  807. .name = "s3c2410-ohci",
  808. .id = -1,
  809. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  810. .resource = s3c_usb_resource,
  811. .dev = {
  812. .dma_mask = &samsung_device_dma_mask,
  813. .coherent_dma_mask = DMA_BIT_MASK(32),
  814. }
  815. };
  816. /*
  817. * s3c_ohci_set_platdata - initialise OHCI device platform data
  818. * @info: The platform data.
  819. *
  820. * This call copies the @info passed in and sets the device .platform_data
  821. * field to that copy. The @info is copied so that the original can be marked
  822. * __initdata.
  823. */
  824. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  825. {
  826. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  827. &s3c_device_ohci);
  828. }
  829. #endif /* CONFIG_S3C_DEV_USB_HOST */
  830. /* USB Device (Gadget) */
  831. #ifdef CONFIG_PLAT_S3C24XX
  832. static struct resource s3c_usbgadget_resource[] = {
  833. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  834. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  835. };
  836. struct platform_device s3c_device_usbgadget = {
  837. .name = "s3c2410-usbgadget",
  838. .id = -1,
  839. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  840. .resource = s3c_usbgadget_resource,
  841. };
  842. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  843. {
  844. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  845. }
  846. #endif /* CONFIG_PLAT_S3C24XX */
  847. /* USB HSOTG */
  848. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  849. static struct resource s3c_usb_hsotg_resources[] = {
  850. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
  851. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  852. };
  853. struct platform_device s3c_device_usb_hsotg = {
  854. .name = "s3c-hsotg",
  855. .id = -1,
  856. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  857. .resource = s3c_usb_hsotg_resources,
  858. .dev = {
  859. .dma_mask = &samsung_device_dma_mask,
  860. .coherent_dma_mask = DMA_BIT_MASK(32),
  861. },
  862. };
  863. void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd)
  864. {
  865. struct dwc2_hsotg_plat *npd;
  866. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_usb_hsotg);
  867. if (!npd->phy_init)
  868. npd->phy_init = s3c_usb_phy_init;
  869. if (!npd->phy_exit)
  870. npd->phy_exit = s3c_usb_phy_exit;
  871. }
  872. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  873. /* USB High Spped 2.0 Device (Gadget) */
  874. #ifdef CONFIG_PLAT_S3C24XX
  875. static struct resource s3c_hsudc_resource[] = {
  876. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  877. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  878. };
  879. struct platform_device s3c_device_usb_hsudc = {
  880. .name = "s3c-hsudc",
  881. .id = -1,
  882. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  883. .resource = s3c_hsudc_resource,
  884. .dev = {
  885. .dma_mask = &samsung_device_dma_mask,
  886. .coherent_dma_mask = DMA_BIT_MASK(32),
  887. },
  888. };
  889. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  890. {
  891. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  892. pd->phy_init = s3c_hsudc_init_phy;
  893. pd->phy_uninit = s3c_hsudc_uninit_phy;
  894. }
  895. #endif /* CONFIG_PLAT_S3C24XX */
  896. /* WDT */
  897. #ifdef CONFIG_S3C_DEV_WDT
  898. static struct resource s3c_wdt_resource[] = {
  899. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  900. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  901. };
  902. struct platform_device s3c_device_wdt = {
  903. .name = "s3c2410-wdt",
  904. .id = -1,
  905. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  906. .resource = s3c_wdt_resource,
  907. };
  908. #endif /* CONFIG_S3C_DEV_WDT */
  909. #ifdef CONFIG_S3C64XX_DEV_SPI0
  910. static struct resource s3c64xx_spi0_resource[] = {
  911. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  912. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  913. };
  914. struct platform_device s3c64xx_device_spi0 = {
  915. .name = "s3c6410-spi",
  916. .id = 0,
  917. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  918. .resource = s3c64xx_spi0_resource,
  919. .dev = {
  920. .dma_mask = &samsung_device_dma_mask,
  921. .coherent_dma_mask = DMA_BIT_MASK(32),
  922. },
  923. };
  924. void __init s3c64xx_spi0_set_platdata(int src_clk_nr, int num_cs)
  925. {
  926. struct s3c64xx_spi_info pd;
  927. /* Reject invalid configuration */
  928. if (!num_cs || src_clk_nr < 0) {
  929. pr_err("%s: Invalid SPI configuration\n", __func__);
  930. return;
  931. }
  932. pd.num_cs = num_cs;
  933. pd.src_clk_nr = src_clk_nr;
  934. pd.cfg_gpio = s3c64xx_spi0_cfg_gpio;
  935. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
  936. }
  937. #endif /* CONFIG_S3C64XX_DEV_SPI0 */