adc.c 11 KB

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  1. // SPDX-License-Identifier: GPL-1.0+
  2. //
  3. // Copyright (c) 2008 Simtec Electronics
  4. // http://armlinux.simtec.co.uk/
  5. // Ben Dooks <[email protected]>, <[email protected]>
  6. //
  7. // Samsung ADC device core
  8. #include <linux/module.h>
  9. #include <linux/kernel.h>
  10. #include <linux/mod_devicetable.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/sched.h>
  13. #include <linux/list.h>
  14. #include <linux/slab.h>
  15. #include <linux/err.h>
  16. #include <linux/clk.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/regulator/consumer.h>
  20. #include "regs-adc.h"
  21. #include <linux/soc/samsung/s3c-adc.h>
  22. /* This driver is designed to control the usage of the ADC block between
  23. * the touchscreen and any other drivers that may need to use it, such as
  24. * the hwmon driver.
  25. *
  26. * Priority will be given to the touchscreen driver, but as this itself is
  27. * rate limited it should not starve other requests which are processed in
  28. * order that they are received.
  29. *
  30. * Each user registers to get a client block which uniquely identifies it
  31. * and stores information such as the necessary functions to callback when
  32. * action is required.
  33. */
  34. enum s3c_cpu_type {
  35. TYPE_ADCV1, /* S3C24XX */
  36. TYPE_ADCV11, /* S3C2443 */
  37. TYPE_ADCV12, /* S3C2416, S3C2450 */
  38. TYPE_ADCV2, /* S3C64XX */
  39. TYPE_ADCV3, /* S5PV210, S5PC110, Exynos4210 */
  40. };
  41. struct s3c_adc_client {
  42. struct platform_device *pdev;
  43. struct list_head pend;
  44. wait_queue_head_t *wait;
  45. unsigned int nr_samples;
  46. int result;
  47. unsigned char is_ts;
  48. unsigned char channel;
  49. void (*select_cb)(struct s3c_adc_client *c, unsigned selected);
  50. void (*convert_cb)(struct s3c_adc_client *c,
  51. unsigned val1, unsigned val2,
  52. unsigned *samples_left);
  53. };
  54. struct adc_device {
  55. struct platform_device *pdev;
  56. struct platform_device *owner;
  57. struct clk *clk;
  58. struct s3c_adc_client *cur;
  59. struct s3c_adc_client *ts_pend;
  60. void __iomem *regs;
  61. spinlock_t lock;
  62. unsigned int prescale;
  63. int irq;
  64. struct regulator *vdd;
  65. };
  66. static struct adc_device *adc_dev;
  67. static LIST_HEAD(adc_pending); /* protected by adc_device.lock */
  68. #define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg)
  69. static inline void s3c_adc_convert(struct adc_device *adc)
  70. {
  71. unsigned con = readl(adc->regs + S3C2410_ADCCON);
  72. con |= S3C2410_ADCCON_ENABLE_START;
  73. writel(con, adc->regs + S3C2410_ADCCON);
  74. }
  75. static inline void s3c_adc_select(struct adc_device *adc,
  76. struct s3c_adc_client *client)
  77. {
  78. unsigned con = readl(adc->regs + S3C2410_ADCCON);
  79. enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
  80. client->select_cb(client, 1);
  81. if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV2)
  82. con &= ~S3C2410_ADCCON_MUXMASK;
  83. con &= ~S3C2410_ADCCON_STDBM;
  84. con &= ~S3C2410_ADCCON_STARTMASK;
  85. if (!client->is_ts) {
  86. if (cpu == TYPE_ADCV3)
  87. writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
  88. else if (cpu == TYPE_ADCV11 || cpu == TYPE_ADCV12)
  89. writel(client->channel & 0xf,
  90. adc->regs + S3C2443_ADCMUX);
  91. else
  92. con |= S3C2410_ADCCON_SELMUX(client->channel);
  93. }
  94. writel(con, adc->regs + S3C2410_ADCCON);
  95. }
  96. static void s3c_adc_dbgshow(struct adc_device *adc)
  97. {
  98. adc_dbg(adc, "CON=%08x, TSC=%08x, DLY=%08x\n",
  99. readl(adc->regs + S3C2410_ADCCON),
  100. readl(adc->regs + S3C2410_ADCTSC),
  101. readl(adc->regs + S3C2410_ADCDLY));
  102. }
  103. static void s3c_adc_try(struct adc_device *adc)
  104. {
  105. struct s3c_adc_client *next = adc->ts_pend;
  106. if (!next && !list_empty(&adc_pending)) {
  107. next = list_first_entry(&adc_pending,
  108. struct s3c_adc_client, pend);
  109. list_del(&next->pend);
  110. } else
  111. adc->ts_pend = NULL;
  112. if (next) {
  113. adc_dbg(adc, "new client is %p\n", next);
  114. adc->cur = next;
  115. s3c_adc_select(adc, next);
  116. s3c_adc_convert(adc);
  117. s3c_adc_dbgshow(adc);
  118. }
  119. }
  120. int s3c_adc_start(struct s3c_adc_client *client,
  121. unsigned int channel, unsigned int nr_samples)
  122. {
  123. struct adc_device *adc = adc_dev;
  124. unsigned long flags;
  125. if (!adc) {
  126. printk(KERN_ERR "%s: failed to find adc\n", __func__);
  127. return -EINVAL;
  128. }
  129. spin_lock_irqsave(&adc->lock, flags);
  130. if (client->is_ts && adc->ts_pend) {
  131. spin_unlock_irqrestore(&adc->lock, flags);
  132. return -EAGAIN;
  133. }
  134. client->channel = channel;
  135. client->nr_samples = nr_samples;
  136. if (client->is_ts)
  137. adc->ts_pend = client;
  138. else
  139. list_add_tail(&client->pend, &adc_pending);
  140. if (!adc->cur)
  141. s3c_adc_try(adc);
  142. spin_unlock_irqrestore(&adc->lock, flags);
  143. return 0;
  144. }
  145. EXPORT_SYMBOL_GPL(s3c_adc_start);
  146. static void s3c_convert_done(struct s3c_adc_client *client,
  147. unsigned v, unsigned u, unsigned *left)
  148. {
  149. client->result = v;
  150. wake_up(client->wait);
  151. }
  152. int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch)
  153. {
  154. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wake);
  155. int ret;
  156. client->convert_cb = s3c_convert_done;
  157. client->wait = &wake;
  158. client->result = -1;
  159. ret = s3c_adc_start(client, ch, 1);
  160. if (ret < 0)
  161. goto err;
  162. ret = wait_event_timeout(wake, client->result >= 0, HZ / 2);
  163. if (client->result < 0) {
  164. ret = -ETIMEDOUT;
  165. goto err;
  166. }
  167. client->convert_cb = NULL;
  168. return client->result;
  169. err:
  170. return ret;
  171. }
  172. EXPORT_SYMBOL_GPL(s3c_adc_read);
  173. static void s3c_adc_default_select(struct s3c_adc_client *client,
  174. unsigned select)
  175. {
  176. }
  177. struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev,
  178. void (*select)(struct s3c_adc_client *client,
  179. unsigned int selected),
  180. void (*conv)(struct s3c_adc_client *client,
  181. unsigned d0, unsigned d1,
  182. unsigned *samples_left),
  183. unsigned int is_ts)
  184. {
  185. struct s3c_adc_client *client;
  186. WARN_ON(!pdev);
  187. if (!select)
  188. select = s3c_adc_default_select;
  189. if (!pdev)
  190. return ERR_PTR(-EINVAL);
  191. client = kzalloc(sizeof(*client), GFP_KERNEL);
  192. if (!client)
  193. return ERR_PTR(-ENOMEM);
  194. client->pdev = pdev;
  195. client->is_ts = is_ts;
  196. client->select_cb = select;
  197. client->convert_cb = conv;
  198. return client;
  199. }
  200. EXPORT_SYMBOL_GPL(s3c_adc_register);
  201. void s3c_adc_release(struct s3c_adc_client *client)
  202. {
  203. unsigned long flags;
  204. spin_lock_irqsave(&adc_dev->lock, flags);
  205. /* We should really check that nothing is in progress. */
  206. if (adc_dev->cur == client)
  207. adc_dev->cur = NULL;
  208. if (adc_dev->ts_pend == client)
  209. adc_dev->ts_pend = NULL;
  210. else {
  211. struct list_head *p, *n;
  212. struct s3c_adc_client *tmp;
  213. list_for_each_safe(p, n, &adc_pending) {
  214. tmp = list_entry(p, struct s3c_adc_client, pend);
  215. if (tmp == client)
  216. list_del(&tmp->pend);
  217. }
  218. }
  219. if (adc_dev->cur == NULL)
  220. s3c_adc_try(adc_dev);
  221. spin_unlock_irqrestore(&adc_dev->lock, flags);
  222. kfree(client);
  223. }
  224. EXPORT_SYMBOL_GPL(s3c_adc_release);
  225. static irqreturn_t s3c_adc_irq(int irq, void *pw)
  226. {
  227. struct adc_device *adc = pw;
  228. struct s3c_adc_client *client = adc->cur;
  229. enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
  230. unsigned data0, data1;
  231. if (!client) {
  232. dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__);
  233. goto exit;
  234. }
  235. data0 = readl(adc->regs + S3C2410_ADCDAT0);
  236. data1 = readl(adc->regs + S3C2410_ADCDAT1);
  237. adc_dbg(adc, "read %d: 0x%04x, 0x%04x\n", client->nr_samples, data0, data1);
  238. client->nr_samples--;
  239. if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV11) {
  240. data0 &= 0x3ff;
  241. data1 &= 0x3ff;
  242. } else {
  243. /* S3C2416/S3C64XX/S5P ADC resolution is 12-bit */
  244. data0 &= 0xfff;
  245. data1 &= 0xfff;
  246. }
  247. if (client->convert_cb)
  248. (client->convert_cb)(client, data0, data1, &client->nr_samples);
  249. if (client->nr_samples > 0) {
  250. /* fire another conversion for this */
  251. client->select_cb(client, 1);
  252. s3c_adc_convert(adc);
  253. } else {
  254. spin_lock(&adc->lock);
  255. (client->select_cb)(client, 0);
  256. adc->cur = NULL;
  257. s3c_adc_try(adc);
  258. spin_unlock(&adc->lock);
  259. }
  260. exit:
  261. if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) {
  262. /* Clear ADC interrupt */
  263. writel(0, adc->regs + S3C64XX_ADCCLRINT);
  264. }
  265. return IRQ_HANDLED;
  266. }
  267. static int s3c_adc_probe(struct platform_device *pdev)
  268. {
  269. struct device *dev = &pdev->dev;
  270. struct adc_device *adc;
  271. enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data;
  272. int ret;
  273. unsigned tmp;
  274. adc = devm_kzalloc(dev, sizeof(*adc), GFP_KERNEL);
  275. if (!adc)
  276. return -ENOMEM;
  277. spin_lock_init(&adc->lock);
  278. adc->pdev = pdev;
  279. adc->prescale = S3C2410_ADCCON_PRSCVL(49);
  280. adc->vdd = devm_regulator_get(dev, "vdd");
  281. if (IS_ERR(adc->vdd)) {
  282. dev_err(dev, "operating without regulator \"vdd\" .\n");
  283. return PTR_ERR(adc->vdd);
  284. }
  285. adc->irq = platform_get_irq(pdev, 1);
  286. if (adc->irq <= 0)
  287. return -ENOENT;
  288. ret = devm_request_irq(dev, adc->irq, s3c_adc_irq, 0, dev_name(dev),
  289. adc);
  290. if (ret < 0) {
  291. dev_err(dev, "failed to attach adc irq\n");
  292. return ret;
  293. }
  294. adc->clk = devm_clk_get(dev, "adc");
  295. if (IS_ERR(adc->clk)) {
  296. dev_err(dev, "failed to get adc clock\n");
  297. return PTR_ERR(adc->clk);
  298. }
  299. adc->regs = devm_platform_ioremap_resource(pdev, 0);
  300. if (IS_ERR(adc->regs))
  301. return PTR_ERR(adc->regs);
  302. ret = regulator_enable(adc->vdd);
  303. if (ret)
  304. return ret;
  305. clk_prepare_enable(adc->clk);
  306. tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
  307. /* Enable 12-bit ADC resolution */
  308. if (cpu == TYPE_ADCV12)
  309. tmp |= S3C2416_ADCCON_RESSEL;
  310. if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3)
  311. tmp |= S3C64XX_ADCCON_RESSEL;
  312. writel(tmp, adc->regs + S3C2410_ADCCON);
  313. dev_info(dev, "attached adc driver\n");
  314. platform_set_drvdata(pdev, adc);
  315. adc_dev = adc;
  316. return 0;
  317. }
  318. static int s3c_adc_remove(struct platform_device *pdev)
  319. {
  320. struct adc_device *adc = platform_get_drvdata(pdev);
  321. clk_disable_unprepare(adc->clk);
  322. regulator_disable(adc->vdd);
  323. return 0;
  324. }
  325. #ifdef CONFIG_PM
  326. static int s3c_adc_suspend(struct device *dev)
  327. {
  328. struct adc_device *adc = dev_get_drvdata(dev);
  329. unsigned long flags;
  330. u32 con;
  331. spin_lock_irqsave(&adc->lock, flags);
  332. con = readl(adc->regs + S3C2410_ADCCON);
  333. con |= S3C2410_ADCCON_STDBM;
  334. writel(con, adc->regs + S3C2410_ADCCON);
  335. disable_irq(adc->irq);
  336. spin_unlock_irqrestore(&adc->lock, flags);
  337. clk_disable(adc->clk);
  338. regulator_disable(adc->vdd);
  339. return 0;
  340. }
  341. static int s3c_adc_resume(struct device *dev)
  342. {
  343. struct platform_device *pdev = to_platform_device(dev);
  344. struct adc_device *adc = platform_get_drvdata(pdev);
  345. enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data;
  346. int ret;
  347. unsigned long tmp;
  348. ret = regulator_enable(adc->vdd);
  349. if (ret)
  350. return ret;
  351. clk_enable(adc->clk);
  352. enable_irq(adc->irq);
  353. tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
  354. /* Enable 12-bit ADC resolution */
  355. if (cpu == TYPE_ADCV12)
  356. tmp |= S3C2416_ADCCON_RESSEL;
  357. if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3)
  358. tmp |= S3C64XX_ADCCON_RESSEL;
  359. writel(tmp, adc->regs + S3C2410_ADCCON);
  360. return 0;
  361. }
  362. #else
  363. #define s3c_adc_suspend NULL
  364. #define s3c_adc_resume NULL
  365. #endif
  366. static const struct platform_device_id s3c_adc_driver_ids[] = {
  367. {
  368. .name = "s3c24xx-adc",
  369. .driver_data = TYPE_ADCV1,
  370. }, {
  371. .name = "s3c2443-adc",
  372. .driver_data = TYPE_ADCV11,
  373. }, {
  374. .name = "s3c2416-adc",
  375. .driver_data = TYPE_ADCV12,
  376. }, {
  377. .name = "s3c64xx-adc",
  378. .driver_data = TYPE_ADCV2,
  379. }, {
  380. .name = "samsung-adc-v3",
  381. .driver_data = TYPE_ADCV3,
  382. },
  383. { }
  384. };
  385. MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids);
  386. static const struct dev_pm_ops adc_pm_ops = {
  387. .suspend = s3c_adc_suspend,
  388. .resume = s3c_adc_resume,
  389. };
  390. static struct platform_driver s3c_adc_driver = {
  391. .id_table = s3c_adc_driver_ids,
  392. .driver = {
  393. .name = "s3c-adc",
  394. .pm = &adc_pm_ops,
  395. },
  396. .probe = s3c_adc_probe,
  397. .remove = s3c_adc_remove,
  398. };
  399. static int __init adc_init(void)
  400. {
  401. int ret;
  402. ret = platform_driver_register(&s3c_adc_driver);
  403. if (ret)
  404. printk(KERN_ERR "%s: failed to add adc driver\n", __func__);
  405. return ret;
  406. }
  407. module_init(adc_init);