pxa27x.c 8.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/arch/arm/mach-pxa/pxa27x.c
  4. *
  5. * Author: Nicolas Pitre
  6. * Created: Nov 05, 2002
  7. * Copyright: MontaVista Software Inc.
  8. *
  9. * Code specific to PXA27x aka Bulverde.
  10. */
  11. #include <linux/dmaengine.h>
  12. #include <linux/dma/pxa-dma.h>
  13. #include <linux/gpio.h>
  14. #include <linux/gpio-pxa.h>
  15. #include <linux/module.h>
  16. #include <linux/kernel.h>
  17. #include <linux/init.h>
  18. #include <linux/irqchip.h>
  19. #include <linux/suspend.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/syscore_ops.h>
  22. #include <linux/io.h>
  23. #include <linux/irq.h>
  24. #include <linux/platform_data/i2c-pxa.h>
  25. #include <linux/platform_data/mmp_dma.h>
  26. #include <linux/soc/pxa/cpu.h>
  27. #include <asm/mach/map.h>
  28. #include <asm/irq.h>
  29. #include <asm/suspend.h>
  30. #include "irqs.h"
  31. #include "pxa27x.h"
  32. #include "reset.h"
  33. #include <linux/platform_data/usb-ohci-pxa27x.h>
  34. #include "pm.h"
  35. #include "addr-map.h"
  36. #include "smemc.h"
  37. #include "generic.h"
  38. #include "devices.h"
  39. #include <linux/clk-provider.h>
  40. #include <linux/clkdev.h>
  41. void pxa27x_clear_otgph(void)
  42. {
  43. if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
  44. PSSR |= PSSR_OTGPH;
  45. }
  46. EXPORT_SYMBOL(pxa27x_clear_otgph);
  47. static unsigned long ac97_reset_config[] = {
  48. GPIO113_AC97_nRESET_GPIO_HIGH,
  49. GPIO113_AC97_nRESET,
  50. GPIO95_AC97_nRESET_GPIO_HIGH,
  51. GPIO95_AC97_nRESET,
  52. };
  53. void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio)
  54. {
  55. /*
  56. * This helper function is used to work around a bug in the pxa27x's
  57. * ac97 controller during a warm reset. The configuration of the
  58. * reset_gpio is changed as follows:
  59. * to_gpio == true: configured to generic output gpio and driven high
  60. * to_gpio == false: configured to ac97 controller alt fn AC97_nRESET
  61. */
  62. if (reset_gpio == 113)
  63. pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[0] :
  64. &ac97_reset_config[1], 1);
  65. if (reset_gpio == 95)
  66. pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[2] :
  67. &ac97_reset_config[3], 1);
  68. }
  69. EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset);
  70. #ifdef CONFIG_PM
  71. #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
  72. #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
  73. /*
  74. * allow platforms to override default PWRMODE setting used for PM_SUSPEND_MEM
  75. */
  76. static unsigned int pwrmode = PWRMODE_SLEEP;
  77. int pxa27x_set_pwrmode(unsigned int mode)
  78. {
  79. switch (mode) {
  80. case PWRMODE_SLEEP:
  81. case PWRMODE_DEEPSLEEP:
  82. pwrmode = mode;
  83. return 0;
  84. }
  85. return -EINVAL;
  86. }
  87. /*
  88. * List of global PXA peripheral registers to preserve.
  89. * More ones like CP and general purpose register values are preserved
  90. * with the stack pointer in sleep.S.
  91. */
  92. enum {
  93. SLEEP_SAVE_PSTR,
  94. SLEEP_SAVE_MDREFR,
  95. SLEEP_SAVE_PCFR,
  96. SLEEP_SAVE_COUNT
  97. };
  98. void pxa27x_cpu_pm_save(unsigned long *sleep_save)
  99. {
  100. sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR);
  101. SAVE(PCFR);
  102. SAVE(PSTR);
  103. }
  104. void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
  105. {
  106. __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR);
  107. RESTORE(PCFR);
  108. PSSR = PSSR_RDH | PSSR_PH;
  109. RESTORE(PSTR);
  110. }
  111. void pxa27x_cpu_pm_enter(suspend_state_t state)
  112. {
  113. extern void pxa_cpu_standby(void);
  114. #ifndef CONFIG_IWMMXT
  115. u64 acc0;
  116. asm volatile(".arch_extension xscale\n\t"
  117. "mra %Q0, %R0, acc0" : "=r" (acc0));
  118. #endif
  119. /* ensure voltage-change sequencer not initiated, which hangs */
  120. PCFR &= ~PCFR_FVC;
  121. /* Clear edge-detect status register. */
  122. PEDR = 0xDF12FE1B;
  123. /* Clear reset status */
  124. RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
  125. switch (state) {
  126. case PM_SUSPEND_STANDBY:
  127. pxa_cpu_standby();
  128. break;
  129. case PM_SUSPEND_MEM:
  130. cpu_suspend(pwrmode, pxa27x_finish_suspend);
  131. #ifndef CONFIG_IWMMXT
  132. asm volatile(".arch_extension xscale\n\t"
  133. "mar acc0, %Q0, %R0" : "=r" (acc0));
  134. #endif
  135. break;
  136. }
  137. }
  138. static int pxa27x_cpu_pm_valid(suspend_state_t state)
  139. {
  140. return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
  141. }
  142. static int pxa27x_cpu_pm_prepare(void)
  143. {
  144. /* set resume return address */
  145. PSPR = __pa_symbol(cpu_resume);
  146. return 0;
  147. }
  148. static void pxa27x_cpu_pm_finish(void)
  149. {
  150. /* ensure not to come back here if it wasn't intended */
  151. PSPR = 0;
  152. }
  153. static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
  154. .save_count = SLEEP_SAVE_COUNT,
  155. .save = pxa27x_cpu_pm_save,
  156. .restore = pxa27x_cpu_pm_restore,
  157. .valid = pxa27x_cpu_pm_valid,
  158. .enter = pxa27x_cpu_pm_enter,
  159. .prepare = pxa27x_cpu_pm_prepare,
  160. .finish = pxa27x_cpu_pm_finish,
  161. };
  162. static void __init pxa27x_init_pm(void)
  163. {
  164. pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns;
  165. }
  166. #else
  167. static inline void pxa27x_init_pm(void) {}
  168. #endif
  169. /* PXA27x: Various gpios can issue wakeup events. This logic only
  170. * handles the simple cases, not the WEMUX2 and WEMUX3 options
  171. */
  172. static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
  173. {
  174. int gpio = pxa_irq_to_gpio(d->irq);
  175. uint32_t mask;
  176. if (gpio >= 0 && gpio < 128)
  177. return gpio_set_wake(gpio, on);
  178. if (d->irq == IRQ_KEYPAD)
  179. return keypad_set_wake(on);
  180. switch (d->irq) {
  181. case IRQ_RTCAlrm:
  182. mask = PWER_RTC;
  183. break;
  184. case IRQ_USB:
  185. mask = 1u << 26;
  186. break;
  187. default:
  188. return -EINVAL;
  189. }
  190. if (on)
  191. PWER |= mask;
  192. else
  193. PWER &=~mask;
  194. return 0;
  195. }
  196. void __init pxa27x_init_irq(void)
  197. {
  198. pxa_init_irq(34, pxa27x_set_wake);
  199. }
  200. static int __init
  201. pxa27x_dt_init_irq(struct device_node *node, struct device_node *parent)
  202. {
  203. pxa_dt_irq_init(pxa27x_set_wake);
  204. set_handle_irq(ichp_handle_irq);
  205. return 0;
  206. }
  207. IRQCHIP_DECLARE(pxa27x_intc, "marvell,pxa-intc", pxa27x_dt_init_irq);
  208. static struct map_desc pxa27x_io_desc[] __initdata = {
  209. { /* Mem Ctl */
  210. .virtual = (unsigned long)SMEMC_VIRT,
  211. .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
  212. .length = SMEMC_SIZE,
  213. .type = MT_DEVICE
  214. }, { /* UNCACHED_PHYS_0 */
  215. .virtual = UNCACHED_PHYS_0,
  216. .pfn = __phys_to_pfn(0x00000000),
  217. .length = UNCACHED_PHYS_0_SIZE,
  218. .type = MT_DEVICE
  219. },
  220. };
  221. void __init pxa27x_map_io(void)
  222. {
  223. pxa_map_io();
  224. iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc));
  225. pxa27x_get_clk_frequency_khz(1);
  226. }
  227. /*
  228. * device registration specific to PXA27x.
  229. */
  230. void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
  231. {
  232. local_irq_disable();
  233. PCFR |= PCFR_PI2CEN;
  234. local_irq_enable();
  235. pxa_register_device(&pxa27x_device_i2c_power, info);
  236. }
  237. static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
  238. .irq_base = PXA_GPIO_TO_IRQ(0),
  239. .gpio_set_wake = gpio_set_wake,
  240. };
  241. static struct platform_device *devices[] __initdata = {
  242. &pxa27x_device_udc,
  243. &pxa_device_pmu,
  244. &pxa_device_i2s,
  245. &pxa_device_asoc_ssp1,
  246. &pxa_device_asoc_ssp2,
  247. &pxa_device_asoc_ssp3,
  248. &pxa_device_asoc_platform,
  249. &pxa_device_rtc,
  250. &pxa27x_device_ssp1,
  251. &pxa27x_device_ssp2,
  252. &pxa27x_device_ssp3,
  253. &pxa27x_device_pwm0,
  254. &pxa27x_device_pwm1,
  255. };
  256. static const struct dma_slave_map pxa27x_slave_map[] = {
  257. /* PXA25x, PXA27x and PXA3xx common entries */
  258. { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
  259. { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
  260. { "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
  261. PDMA_FILTER_PARAM(LOWEST, 10) },
  262. { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
  263. { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
  264. { "pxa-ssp-dai.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
  265. { "pxa-ssp-dai.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
  266. { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
  267. { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
  268. { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
  269. { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
  270. { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
  271. { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
  272. { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 66) },
  273. { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 67) },
  274. /* PXA27x specific map */
  275. { "pxa2xx-i2s", "rx", PDMA_FILTER_PARAM(LOWEST, 2) },
  276. { "pxa2xx-i2s", "tx", PDMA_FILTER_PARAM(LOWEST, 3) },
  277. { "pxa27x-camera.0", "CI_Y", PDMA_FILTER_PARAM(HIGHEST, 68) },
  278. { "pxa27x-camera.0", "CI_U", PDMA_FILTER_PARAM(HIGHEST, 69) },
  279. { "pxa27x-camera.0", "CI_V", PDMA_FILTER_PARAM(HIGHEST, 70) },
  280. };
  281. static struct mmp_dma_platdata pxa27x_dma_pdata = {
  282. .dma_channels = 32,
  283. .nb_requestors = 75,
  284. .slave_map = pxa27x_slave_map,
  285. .slave_map_cnt = ARRAY_SIZE(pxa27x_slave_map),
  286. };
  287. static int __init pxa27x_init(void)
  288. {
  289. int ret = 0;
  290. if (cpu_is_pxa27x()) {
  291. pxa_register_wdt(RCSR);
  292. pxa27x_init_pm();
  293. register_syscore_ops(&pxa_irq_syscore_ops);
  294. register_syscore_ops(&pxa2xx_mfp_syscore_ops);
  295. if (!of_have_populated_dt()) {
  296. pxa_register_device(&pxa27x_device_gpio,
  297. &pxa27x_gpio_info);
  298. pxa2xx_set_dmac_info(&pxa27x_dma_pdata);
  299. ret = platform_add_devices(devices,
  300. ARRAY_SIZE(devices));
  301. }
  302. }
  303. return ret;
  304. }
  305. postcore_initcall(pxa27x_init);