palmz72.h 2.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * GPIOs and interrupts for Palm Zire72 Handheld Computer
  4. *
  5. * Authors: Alex Osborne <[email protected]>
  6. * Jan Herman <[email protected]>
  7. * Sergey Lapin <[email protected]>
  8. */
  9. #ifndef _INCLUDE_PALMZ72_H_
  10. #define _INCLUDE_PALMZ72_H_
  11. /* Power and control */
  12. #define GPIO_NR_PALMZ72_GPIO_RESET 1
  13. #define GPIO_NR_PALMZ72_POWER_DETECT 0
  14. /* SD/MMC */
  15. #define GPIO_NR_PALMZ72_SD_DETECT_N 14
  16. #define GPIO_NR_PALMZ72_SD_POWER_N 98
  17. #define GPIO_NR_PALMZ72_SD_RO 115
  18. /* Touchscreen */
  19. #define GPIO_NR_PALMZ72_WM9712_IRQ 27
  20. /* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
  21. #define GPIO_NR_PALMZ72_IR_DISABLE 49
  22. /* USB */
  23. #define GPIO_NR_PALMZ72_USB_DETECT_N 15
  24. #define GPIO_NR_PALMZ72_USB_PULLUP 95
  25. /* LCD/Backlight */
  26. #define GPIO_NR_PALMZ72_BL_POWER 20
  27. #define GPIO_NR_PALMZ72_LCD_POWER 96
  28. /* LED */
  29. #define GPIO_NR_PALMZ72_LED_GREEN 88
  30. /* Bluetooth */
  31. #define GPIO_NR_PALMZ72_BT_POWER 17
  32. #define GPIO_NR_PALMZ72_BT_RESET 83
  33. /* Camera */
  34. #define GPIO_NR_PALMZ72_CAM_PWDN 56
  35. #define GPIO_NR_PALMZ72_CAM_RESET 57
  36. #define GPIO_NR_PALMZ72_CAM_POWER 91
  37. /** Initial values **/
  38. /* Battery */
  39. #define PALMZ72_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
  40. #define PALMZ72_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
  41. #define PALMZ72_BAT_MAX_CURRENT 0 /* unknown */
  42. #define PALMZ72_BAT_MIN_CURRENT 0 /* unknown */
  43. #define PALMZ72_BAT_MAX_CHARGE 1 /* unknown */
  44. #define PALMZ72_BAT_MIN_CHARGE 1 /* unknown */
  45. #define PALMZ72_MAX_LIFE_MINS 360 /* on-life in minutes */
  46. /* Backlight */
  47. #define PALMZ72_MAX_INTENSITY 0xFE
  48. #define PALMZ72_DEFAULT_INTENSITY 0x7E
  49. #define PALMZ72_LIMIT_MASK 0x7F
  50. #define PALMZ72_PRESCALER 0x3F
  51. #define PALMZ72_PERIOD_NS 3500
  52. #ifdef CONFIG_PM
  53. struct palmz72_resume_info {
  54. u32 magic0; /* 0x0 */
  55. u32 magic1; /* 0x4 */
  56. u32 resume_addr; /* 0x8 */
  57. u32 pad[11]; /* 0xc..0x37 */
  58. u32 arm_control; /* 0x38 */
  59. u32 aux_control; /* 0x3c */
  60. u32 ttb; /* 0x40 */
  61. u32 domain_access; /* 0x44 */
  62. u32 process_id; /* 0x48 */
  63. };
  64. #endif
  65. #endif