generic.c 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/arch/arm/mach-pxa/generic.c
  4. *
  5. * Author: Nicolas Pitre
  6. * Created: Jun 15, 2001
  7. * Copyright: MontaVista Software Inc.
  8. *
  9. * Code common to all PXA machines.
  10. *
  11. * Since this file should be linked before any other machine specific file,
  12. * the __initcall() here will be executed first. This serves as default
  13. * initialization stuff for PXA machines which can be overridden later if
  14. * need be.
  15. */
  16. #include <linux/gpio.h>
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/init.h>
  20. #include <linux/soc/pxa/cpu.h>
  21. #include <linux/soc/pxa/smemc.h>
  22. #include <linux/clk/pxa.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/mach-types.h>
  25. #include "addr-map.h"
  26. #include "irqs.h"
  27. #include "reset.h"
  28. #include "smemc.h"
  29. #include "pxa3xx-regs.h"
  30. #include "generic.h"
  31. #include <clocksource/pxa.h>
  32. void clear_reset_status(unsigned int mask)
  33. {
  34. if (cpu_is_pxa2xx())
  35. pxa2xx_clear_reset_status(mask);
  36. else {
  37. /* RESET_STATUS_* has a 1:1 mapping with ARSR */
  38. ARSR = mask;
  39. }
  40. }
  41. /*
  42. * For non device-tree builds, keep legacy timer init
  43. */
  44. void __init pxa_timer_init(void)
  45. {
  46. if (cpu_is_pxa25x())
  47. pxa25x_clocks_init(io_p2v(0x41300000));
  48. if (cpu_is_pxa27x())
  49. pxa27x_clocks_init(io_p2v(0x41300000));
  50. if (cpu_is_pxa3xx())
  51. pxa3xx_clocks_init(io_p2v(0x41340000), io_p2v(0x41350000));
  52. pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000));
  53. }
  54. void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio)
  55. {
  56. __raw_writel(mcmem, MCMEM(sock));
  57. __raw_writel(mcatt, MCATT(sock));
  58. __raw_writel(mcio, MCIO(sock));
  59. }
  60. EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing);
  61. void pxa_smemc_set_pcmcia_socket(int nr)
  62. {
  63. switch (nr) {
  64. case 0:
  65. __raw_writel(0, MECR);
  66. break;
  67. case 1:
  68. /*
  69. * We have at least one socket, so set MECR:CIT
  70. * (Card Is There)
  71. */
  72. __raw_writel(MECR_CIT, MECR);
  73. break;
  74. case 2:
  75. /* Set CIT and MECR:NOS (Number Of Sockets) */
  76. __raw_writel(MECR_CIT | MECR_NOS, MECR);
  77. break;
  78. }
  79. }
  80. EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket);
  81. void __iomem *pxa_smemc_get_mdrefr(void)
  82. {
  83. return MDREFR;
  84. }
  85. /*
  86. * Intel PXA2xx internal register mapping.
  87. *
  88. * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
  89. * and cache flush area.
  90. */
  91. static struct map_desc common_io_desc[] __initdata = {
  92. { /* Devs */
  93. .virtual = (unsigned long)PERIPH_VIRT,
  94. .pfn = __phys_to_pfn(PERIPH_PHYS),
  95. .length = PERIPH_SIZE,
  96. .type = MT_DEVICE
  97. }
  98. };
  99. void __init pxa_map_io(void)
  100. {
  101. debug_ll_io_init();
  102. iotable_init(ARRAY_AND_SIZE(common_io_desc));
  103. }