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mach-omap2
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prcm43xx.h

prcm43xx.h 2.1 KB
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  1. /* SPDX-License-Identifier: GPL-2.0-only */
    2. 

  2. /*
    3. 

  3.  * AM43x PRCM defines
    4. 

  4.  *
    5. 

  5.  * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
    6. 

  6.  */
    7. 

  7. 

  8. #ifndef __ARCH_ARM_MACH_OMAP2_PRCM_43XX_H
    9. 

  9. #define __ARCH_ARM_MACH_OMAP2_PRCM_43XX_H
    10. 

  10. 

  11. #define AM43XX_PRM_PARTITION				1
    12. 

  12. #define AM43XX_CM_PARTITION				1
    13. 

  13. 

  14. /* PRM instances */
    15. 

  15. #define AM43XX_PRM_OCP_SOCKET_INST			0x0000
    16. 

  16. #define AM43XX_PRM_MPU_INST				0x0300
    17. 

  17. #define AM43XX_PRM_GFX_INST				0x0400
    18. 

  18. #define AM43XX_PRM_RTC_INST				0x0500
    19. 

  19. #define AM43XX_PRM_TAMPER_INST				0x0600
    20. 

  20. #define AM43XX_PRM_CEFUSE_INST				0x0700
    21. 

  21. #define AM43XX_PRM_PER_INST				0x0800
    22. 

  22. #define AM43XX_PRM_WKUP_INST				0x2000
    23. 

  23. #define AM43XX_PRM_DEVICE_INST				0x4000
    24. 

  24. 

  25. /* PRM_IRQ offsets */
    26. 

  26. #define AM43XX_PRM_IRQSTATUS_MPU_OFFSET			0x0004
    27. 

  27. #define AM43XX_PRM_IRQENABLE_MPU_OFFSET			0x0008
    28. 

  28. 

  29. /* Other PRM offsets */
    30. 

  30. #define AM43XX_PRM_IO_PMCTRL_OFFSET			0x0024
    31. 

  31. 

  32. /* CM instances */
    33. 

  33. #define AM43XX_CM_WKUP_INST				0x2800
    34. 

  34. #define AM43XX_CM_MPU_INST				0x8300
    35. 

  35. #define AM43XX_CM_GFX_INST				0x8400
    36. 

  36. #define AM43XX_CM_RTC_INST				0x8500
    37. 

  37. #define AM43XX_CM_TAMPER_INST				0x8600
    38. 

  38. #define AM43XX_CM_CEFUSE_INST				0x8700
    39. 

  39. #define AM43XX_CM_PER_INST				0x8800
    40. 

  40. 

  41. /* CD offsets */
    42. 

  42. #define AM43XX_CM_WKUP_L3_AON_CDOFFS			0x0000
    43. 

  43. #define AM43XX_CM_WKUP_L3S_TSC_CDOFFS			0x0100
    44. 

  44. #define AM43XX_CM_WKUP_L4_WKUP_AON_CDOFFS		0x0200
    45. 

  45. #define AM43XX_CM_WKUP_WKUP_CDOFFS			0x0300
    46. 

  46. #define AM43XX_CM_MPU_MPU_CDOFFS			0x0000
    47. 

  47. #define AM43XX_CM_GFX_GFX_L3_CDOFFS			0x0000
    48. 

  48. #define AM43XX_CM_RTC_RTC_CDOFFS			0x0000
    49. 

  49. #define AM43XX_CM_TAMPER_TAMPER_CDOFFS			0x0000
    50. 

  50. #define AM43XX_CM_CEFUSE_CEFUSE_CDOFFS			0x0000
    51. 

  51. #define AM43XX_CM_PER_L3_CDOFFS				0x0000
    52. 

  52. #define AM43XX_CM_PER_L3S_CDOFFS			0x0200
    53. 

  53. #define AM43XX_CM_PER_ICSS_CDOFFS			0x0300
    54. 

  54. #define AM43XX_CM_PER_L4LS_CDOFFS			0x0400
    55. 

  55. #define AM43XX_CM_PER_EMIF_CDOFFS			0x0700
    56. 

  56. #define AM43XX_CM_PER_LCDC_CDOFFS			0x0800
    57. 

  57. #define AM43XX_CM_PER_DSS_CDOFFS			0x0a00
    58. 

  58. #define AM43XX_CM_PER_CPSW_CDOFFS			0x0b00
    59. 

  59. #define AM43XX_CM_PER_OCPWP_L3_CDOFFS			0x0c00
    60. 

  60. 

  61. /* CLK CTRL offsets */
    62. 

  62. #define AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET		0x0020
    63. 

  63. #define AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET		0x0720
    64. 

  64. 

  65. #endif
    66.