board-n8x0.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/arch/arm/mach-omap2/board-n8x0.c
  4. *
  5. * Copyright (C) 2005-2009 Nokia Corporation
  6. * Author: Juha Yrjola <[email protected]>
  7. *
  8. * Modified from mach-omap2/board-generic.c
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/delay.h>
  12. #include <linux/gpio.h>
  13. #include <linux/init.h>
  14. #include <linux/io.h>
  15. #include <linux/irq.h>
  16. #include <linux/stddef.h>
  17. #include <linux/i2c.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/usb/musb.h>
  20. #include <linux/mmc/host.h>
  21. #include <linux/platform_data/spi-omap2-mcspi.h>
  22. #include <linux/platform_data/mmc-omap.h>
  23. #include <linux/mfd/menelaus.h>
  24. #include <sound/tlv320aic3x.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/mach-types.h>
  27. #include "common.h"
  28. #include "mmc.h"
  29. #include "soc.h"
  30. #include "common-board-devices.h"
  31. #define TUSB6010_ASYNC_CS 1
  32. #define TUSB6010_SYNC_CS 4
  33. #define TUSB6010_GPIO_INT 58
  34. #define TUSB6010_GPIO_ENABLE 0
  35. #define TUSB6010_DMACHAN 0x3f
  36. #define NOKIA_N810_WIMAX (1 << 2)
  37. #define NOKIA_N810 (1 << 1)
  38. #define NOKIA_N800 (1 << 0)
  39. static u32 board_caps;
  40. #define board_is_n800() (board_caps & NOKIA_N800)
  41. #define board_is_n810() (board_caps & NOKIA_N810)
  42. #define board_is_n810_wimax() (board_caps & NOKIA_N810_WIMAX)
  43. static void board_check_revision(void)
  44. {
  45. if (of_machine_is_compatible("nokia,n800"))
  46. board_caps = NOKIA_N800;
  47. else if (of_machine_is_compatible("nokia,n810"))
  48. board_caps = NOKIA_N810;
  49. else if (of_machine_is_compatible("nokia,n810-wimax"))
  50. board_caps = NOKIA_N810_WIMAX;
  51. if (!board_caps)
  52. pr_err("Unknown board\n");
  53. }
  54. #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
  55. /*
  56. * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
  57. * 1.5 V voltage regulators of PM companion chip. Companion chip will then
  58. * provide then PGOOD signal to TUSB6010 which will release it from reset.
  59. */
  60. static int tusb_set_power(int state)
  61. {
  62. int i, retval = 0;
  63. if (state) {
  64. gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
  65. msleep(1);
  66. /* Wait until TUSB6010 pulls INT pin down */
  67. i = 100;
  68. while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
  69. msleep(1);
  70. i--;
  71. }
  72. if (!i) {
  73. printk(KERN_ERR "tusb: powerup failed\n");
  74. retval = -ENODEV;
  75. }
  76. } else {
  77. gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
  78. msleep(10);
  79. }
  80. return retval;
  81. }
  82. static struct musb_hdrc_config musb_config = {
  83. .multipoint = 1,
  84. .dyn_fifo = 1,
  85. .num_eps = 16,
  86. .ram_bits = 12,
  87. };
  88. static struct musb_hdrc_platform_data tusb_data = {
  89. .mode = MUSB_OTG,
  90. .set_power = tusb_set_power,
  91. .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */
  92. .power = 100, /* Max 100 mA VBUS for host mode */
  93. .config = &musb_config,
  94. };
  95. static void __init n8x0_usb_init(void)
  96. {
  97. int ret = 0;
  98. static const char announce[] __initconst = KERN_INFO "TUSB 6010\n";
  99. /* PM companion chip power control pin */
  100. ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW,
  101. "TUSB6010 enable");
  102. if (ret != 0) {
  103. printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
  104. TUSB6010_GPIO_ENABLE);
  105. return;
  106. }
  107. tusb_set_power(0);
  108. ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
  109. TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
  110. TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
  111. if (ret != 0)
  112. goto err;
  113. printk(announce);
  114. return;
  115. err:
  116. gpio_free(TUSB6010_GPIO_ENABLE);
  117. }
  118. #else
  119. static void __init n8x0_usb_init(void) {}
  120. #endif /*CONFIG_USB_MUSB_TUSB6010 */
  121. static struct omap2_mcspi_device_config p54spi_mcspi_config = {
  122. .turbo_mode = 0,
  123. };
  124. static struct spi_board_info n800_spi_board_info[] __initdata = {
  125. {
  126. .modalias = "p54spi",
  127. .bus_num = 2,
  128. .chip_select = 0,
  129. .max_speed_hz = 48000000,
  130. .controller_data = &p54spi_mcspi_config,
  131. },
  132. };
  133. #if defined(CONFIG_MENELAUS) && IS_ENABLED(CONFIG_MMC_OMAP)
  134. /*
  135. * On both N800 and N810, only the first of the two MMC controllers is in use.
  136. * The two MMC slots are multiplexed via Menelaus companion chip over I2C.
  137. * On N800, both slots are powered via Menelaus. On N810, only one of the
  138. * slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
  139. *
  140. * VMMC slot 1 on both N800 and N810
  141. * VDCDC3_APE and VMCS2_APE slot 2 on N800
  142. * GPIO23 and GPIO9 slot 2 EMMC on N810
  143. *
  144. */
  145. #define N8X0_SLOT_SWITCH_GPIO 96
  146. #define N810_EMMC_VSD_GPIO 23
  147. #define N810_EMMC_VIO_GPIO 9
  148. static int slot1_cover_open;
  149. static int slot2_cover_open;
  150. static struct device *mmc_device;
  151. static int n8x0_mmc_switch_slot(struct device *dev, int slot)
  152. {
  153. #ifdef CONFIG_MMC_DEBUG
  154. dev_dbg(dev, "Choose slot %d\n", slot + 1);
  155. #endif
  156. gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot);
  157. return 0;
  158. }
  159. static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
  160. int power_on, int vdd)
  161. {
  162. int mV;
  163. #ifdef CONFIG_MMC_DEBUG
  164. dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
  165. power_on ? "on" : "off", vdd);
  166. #endif
  167. if (slot == 0) {
  168. if (!power_on)
  169. return menelaus_set_vmmc(0);
  170. switch (1 << vdd) {
  171. case MMC_VDD_33_34:
  172. case MMC_VDD_32_33:
  173. case MMC_VDD_31_32:
  174. mV = 3100;
  175. break;
  176. case MMC_VDD_30_31:
  177. mV = 3000;
  178. break;
  179. case MMC_VDD_28_29:
  180. mV = 2800;
  181. break;
  182. case MMC_VDD_165_195:
  183. mV = 1850;
  184. break;
  185. default:
  186. BUG();
  187. }
  188. return menelaus_set_vmmc(mV);
  189. } else {
  190. if (!power_on)
  191. return menelaus_set_vdcdc(3, 0);
  192. switch (1 << vdd) {
  193. case MMC_VDD_33_34:
  194. case MMC_VDD_32_33:
  195. mV = 3300;
  196. break;
  197. case MMC_VDD_30_31:
  198. case MMC_VDD_29_30:
  199. mV = 3000;
  200. break;
  201. case MMC_VDD_28_29:
  202. case MMC_VDD_27_28:
  203. mV = 2800;
  204. break;
  205. case MMC_VDD_24_25:
  206. case MMC_VDD_23_24:
  207. mV = 2400;
  208. break;
  209. case MMC_VDD_22_23:
  210. case MMC_VDD_21_22:
  211. mV = 2200;
  212. break;
  213. case MMC_VDD_20_21:
  214. mV = 2000;
  215. break;
  216. case MMC_VDD_165_195:
  217. mV = 1800;
  218. break;
  219. default:
  220. BUG();
  221. }
  222. return menelaus_set_vdcdc(3, mV);
  223. }
  224. return 0;
  225. }
  226. static void n810_set_power_emmc(struct device *dev,
  227. int power_on)
  228. {
  229. dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off");
  230. if (power_on) {
  231. gpio_set_value(N810_EMMC_VSD_GPIO, 1);
  232. msleep(1);
  233. gpio_set_value(N810_EMMC_VIO_GPIO, 1);
  234. msleep(1);
  235. } else {
  236. gpio_set_value(N810_EMMC_VIO_GPIO, 0);
  237. msleep(50);
  238. gpio_set_value(N810_EMMC_VSD_GPIO, 0);
  239. msleep(50);
  240. }
  241. }
  242. static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
  243. int vdd)
  244. {
  245. if (board_is_n800() || slot == 0)
  246. return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);
  247. n810_set_power_emmc(dev, power_on);
  248. return 0;
  249. }
  250. static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
  251. {
  252. int r;
  253. dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
  254. bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
  255. BUG_ON(slot != 0 && slot != 1);
  256. slot++;
  257. switch (bus_mode) {
  258. case MMC_BUSMODE_OPENDRAIN:
  259. r = menelaus_set_mmc_opendrain(slot, 1);
  260. break;
  261. case MMC_BUSMODE_PUSHPULL:
  262. r = menelaus_set_mmc_opendrain(slot, 0);
  263. break;
  264. default:
  265. BUG();
  266. }
  267. if (r != 0 && printk_ratelimit())
  268. dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
  269. slot);
  270. return r;
  271. }
  272. static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
  273. {
  274. slot++;
  275. BUG_ON(slot != 1 && slot != 2);
  276. if (slot == 1)
  277. return slot1_cover_open;
  278. else
  279. return slot2_cover_open;
  280. }
  281. static void n8x0_mmc_callback(void *data, u8 card_mask)
  282. {
  283. #ifdef CONFIG_MMC_OMAP
  284. int bit, *openp, index;
  285. if (board_is_n800()) {
  286. bit = 1 << 1;
  287. openp = &slot2_cover_open;
  288. index = 1;
  289. } else {
  290. bit = 1;
  291. openp = &slot1_cover_open;
  292. index = 0;
  293. }
  294. if (card_mask & bit)
  295. *openp = 1;
  296. else
  297. *openp = 0;
  298. omap_mmc_notify_cover_event(mmc_device, index, *openp);
  299. #else
  300. pr_warn("MMC: notify cover event not available\n");
  301. #endif
  302. }
  303. static int n8x0_mmc_late_init(struct device *dev)
  304. {
  305. int r, bit, *openp;
  306. int vs2sel;
  307. mmc_device = dev;
  308. r = menelaus_set_slot_sel(1);
  309. if (r < 0)
  310. return r;
  311. if (board_is_n800())
  312. vs2sel = 0;
  313. else
  314. vs2sel = 2;
  315. r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
  316. if (r < 0)
  317. return r;
  318. n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
  319. n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);
  320. r = menelaus_set_mmc_slot(1, 1, 0, 1);
  321. if (r < 0)
  322. return r;
  323. r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
  324. if (r < 0)
  325. return r;
  326. r = menelaus_get_slot_pin_states();
  327. if (r < 0)
  328. return r;
  329. if (board_is_n800()) {
  330. bit = 1 << 1;
  331. openp = &slot2_cover_open;
  332. } else {
  333. bit = 1;
  334. openp = &slot1_cover_open;
  335. slot2_cover_open = 0;
  336. }
  337. /* All slot pin bits seem to be inversed until first switch change */
  338. if (r == 0xf || r == (0xf & ~bit))
  339. r = ~r;
  340. if (r & bit)
  341. *openp = 1;
  342. else
  343. *openp = 0;
  344. r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);
  345. return r;
  346. }
  347. static void n8x0_mmc_shutdown(struct device *dev)
  348. {
  349. int vs2sel;
  350. if (board_is_n800())
  351. vs2sel = 0;
  352. else
  353. vs2sel = 2;
  354. menelaus_set_mmc_slot(1, 0, 0, 0);
  355. menelaus_set_mmc_slot(2, 0, vs2sel, 0);
  356. }
  357. static void n8x0_mmc_cleanup(struct device *dev)
  358. {
  359. menelaus_unregister_mmc_callback();
  360. gpio_free(N8X0_SLOT_SWITCH_GPIO);
  361. if (board_is_n810()) {
  362. gpio_free(N810_EMMC_VSD_GPIO);
  363. gpio_free(N810_EMMC_VIO_GPIO);
  364. }
  365. }
  366. /*
  367. * MMC controller1 has two slots that are multiplexed via I2C.
  368. * MMC controller2 is not in use.
  369. */
  370. static struct omap_mmc_platform_data mmc1_data = {
  371. .nr_slots = 0,
  372. .switch_slot = n8x0_mmc_switch_slot,
  373. .init = n8x0_mmc_late_init,
  374. .cleanup = n8x0_mmc_cleanup,
  375. .shutdown = n8x0_mmc_shutdown,
  376. .max_freq = 24000000,
  377. .slots[0] = {
  378. .wires = 4,
  379. .set_power = n8x0_mmc_set_power,
  380. .set_bus_mode = n8x0_mmc_set_bus_mode,
  381. .get_cover_state = n8x0_mmc_get_cover_state,
  382. .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 |
  383. MMC_VDD_32_33 | MMC_VDD_33_34,
  384. .name = "internal",
  385. },
  386. .slots[1] = {
  387. .set_power = n8x0_mmc_set_power,
  388. .set_bus_mode = n8x0_mmc_set_bus_mode,
  389. .get_cover_state = n8x0_mmc_get_cover_state,
  390. .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 |
  391. MMC_VDD_21_22 | MMC_VDD_22_23 |
  392. MMC_VDD_23_24 | MMC_VDD_24_25 |
  393. MMC_VDD_27_28 | MMC_VDD_28_29 |
  394. MMC_VDD_29_30 | MMC_VDD_30_31 |
  395. MMC_VDD_32_33 | MMC_VDD_33_34,
  396. .name = "external",
  397. },
  398. };
  399. static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
  400. static struct gpio n810_emmc_gpios[] __initdata = {
  401. { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" },
  402. { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" },
  403. };
  404. static void __init n8x0_mmc_init(void)
  405. {
  406. int err;
  407. if (board_is_n810()) {
  408. mmc1_data.slots[0].name = "external";
  409. /*
  410. * Some Samsung Movinand chips do not like open-ended
  411. * multi-block reads and fall to braind-dead state
  412. * while doing so. Reducing the number of blocks in
  413. * the transfer or delays in clock disable do not help
  414. */
  415. mmc1_data.slots[1].name = "internal";
  416. mmc1_data.slots[1].ban_openended = 1;
  417. }
  418. err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW,
  419. "MMC slot switch");
  420. if (err)
  421. return;
  422. if (board_is_n810()) {
  423. err = gpio_request_array(n810_emmc_gpios,
  424. ARRAY_SIZE(n810_emmc_gpios));
  425. if (err) {
  426. gpio_free(N8X0_SLOT_SWITCH_GPIO);
  427. return;
  428. }
  429. }
  430. mmc1_data.nr_slots = 2;
  431. mmc_data[0] = &mmc1_data;
  432. }
  433. #else
  434. static struct omap_mmc_platform_data mmc1_data;
  435. void __init n8x0_mmc_init(void)
  436. {
  437. }
  438. #endif /* CONFIG_MMC_OMAP */
  439. #ifdef CONFIG_MENELAUS
  440. static int n8x0_auto_sleep_regulators(void)
  441. {
  442. u32 val;
  443. int ret;
  444. val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \
  445. | EN_VAUX_SLEEP | EN_VIO_SLEEP \
  446. | EN_VMEM_SLEEP | EN_DC3_SLEEP \
  447. | EN_VC_SLEEP | EN_DC2_SLEEP;
  448. ret = menelaus_set_regulator_sleep(1, val);
  449. if (ret < 0) {
  450. pr_err("Could not set regulators to sleep on menelaus: %u\n",
  451. ret);
  452. return ret;
  453. }
  454. return 0;
  455. }
  456. static int n8x0_auto_voltage_scale(void)
  457. {
  458. int ret;
  459. ret = menelaus_set_vcore_hw(1400, 1050);
  460. if (ret < 0) {
  461. pr_err("Could not set VCORE voltage on menelaus: %u\n", ret);
  462. return ret;
  463. }
  464. return 0;
  465. }
  466. static int n8x0_menelaus_late_init(struct device *dev)
  467. {
  468. int ret;
  469. ret = n8x0_auto_voltage_scale();
  470. if (ret < 0)
  471. return ret;
  472. ret = n8x0_auto_sleep_regulators();
  473. if (ret < 0)
  474. return ret;
  475. return 0;
  476. }
  477. #else
  478. static int n8x0_menelaus_late_init(struct device *dev)
  479. {
  480. return 0;
  481. }
  482. #endif
  483. struct menelaus_platform_data n8x0_menelaus_platform_data = {
  484. .late_init = n8x0_menelaus_late_init,
  485. };
  486. struct aic3x_pdata n810_aic33_data = {
  487. .gpio_reset = 118,
  488. };
  489. static int __init n8x0_late_initcall(void)
  490. {
  491. if (!board_caps)
  492. return -ENODEV;
  493. n8x0_mmc_init();
  494. n8x0_usb_init();
  495. return 0;
  496. }
  497. omap_late_initcall(n8x0_late_initcall);
  498. /*
  499. * Legacy init pdata init for n8x0. Note that we want to follow the
  500. * I2C bus numbering starting at 0 for device tree like other omaps.
  501. */
  502. void * __init n8x0_legacy_init(void)
  503. {
  504. board_check_revision();
  505. spi_register_board_info(n800_spi_board_info,
  506. ARRAY_SIZE(n800_spi_board_info));
  507. return &mmc1_data;
  508. }