gpio16xx.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * OMAP16xx specific gpio init
  4. *
  5. * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
  6. *
  7. * Author:
  8. * Charulatha V <[email protected]>
  9. */
  10. #include <linux/gpio.h>
  11. #include <linux/platform_data/gpio-omap.h>
  12. #include <linux/soc/ti/omap1-io.h>
  13. #include "hardware.h"
  14. #include "irqs.h"
  15. #include "soc.h"
  16. #define OMAP1610_GPIO1_BASE 0xfffbe400
  17. #define OMAP1610_GPIO2_BASE 0xfffbec00
  18. #define OMAP1610_GPIO3_BASE 0xfffbb400
  19. #define OMAP1610_GPIO4_BASE 0xfffbbc00
  20. #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
  21. /* smart idle, enable wakeup */
  22. #define SYSCONFIG_WORD 0x14
  23. /* mpu gpio */
  24. static struct resource omap16xx_mpu_gpio_resources[] = {
  25. {
  26. .start = OMAP1_MPUIO_VBASE,
  27. .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
  28. .flags = IORESOURCE_MEM,
  29. },
  30. {
  31. .start = INT_MPUIO,
  32. .flags = IORESOURCE_IRQ,
  33. },
  34. };
  35. static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
  36. .revision = USHRT_MAX,
  37. .direction = OMAP_MPUIO_IO_CNTL,
  38. .datain = OMAP_MPUIO_INPUT_LATCH,
  39. .dataout = OMAP_MPUIO_OUTPUT,
  40. .irqstatus = OMAP_MPUIO_GPIO_INT,
  41. .irqenable = OMAP_MPUIO_GPIO_MASKIT,
  42. .irqenable_inv = true,
  43. .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
  44. };
  45. static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
  46. .is_mpuio = true,
  47. .bank_width = 16,
  48. .bank_stride = 1,
  49. .regs = &omap16xx_mpuio_regs,
  50. };
  51. static struct platform_device omap16xx_mpu_gpio = {
  52. .name = "omap_gpio",
  53. .id = 0,
  54. .dev = {
  55. .platform_data = &omap16xx_mpu_gpio_config,
  56. },
  57. .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
  58. .resource = omap16xx_mpu_gpio_resources,
  59. };
  60. /* gpio1 */
  61. static struct resource omap16xx_gpio1_resources[] = {
  62. {
  63. .start = OMAP1610_GPIO1_BASE,
  64. .end = OMAP1610_GPIO1_BASE + SZ_2K - 1,
  65. .flags = IORESOURCE_MEM,
  66. },
  67. {
  68. .start = INT_GPIO_BANK1,
  69. .flags = IORESOURCE_IRQ,
  70. },
  71. };
  72. static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
  73. .revision = OMAP1610_GPIO_REVISION,
  74. .direction = OMAP1610_GPIO_DIRECTION,
  75. .set_dataout = OMAP1610_GPIO_SET_DATAOUT,
  76. .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
  77. .datain = OMAP1610_GPIO_DATAIN,
  78. .dataout = OMAP1610_GPIO_DATAOUT,
  79. .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
  80. .irqenable = OMAP1610_GPIO_IRQENABLE1,
  81. .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
  82. .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
  83. .wkup_en = OMAP1610_GPIO_WAKEUPENABLE,
  84. .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
  85. .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
  86. };
  87. static struct omap_gpio_platform_data omap16xx_gpio1_config = {
  88. .bank_width = 16,
  89. .regs = &omap16xx_gpio_regs,
  90. };
  91. static struct platform_device omap16xx_gpio1 = {
  92. .name = "omap_gpio",
  93. .id = 1,
  94. .dev = {
  95. .platform_data = &omap16xx_gpio1_config,
  96. },
  97. .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
  98. .resource = omap16xx_gpio1_resources,
  99. };
  100. /* gpio2 */
  101. static struct resource omap16xx_gpio2_resources[] = {
  102. {
  103. .start = OMAP1610_GPIO2_BASE,
  104. .end = OMAP1610_GPIO2_BASE + SZ_2K - 1,
  105. .flags = IORESOURCE_MEM,
  106. },
  107. {
  108. .start = INT_1610_GPIO_BANK2,
  109. .flags = IORESOURCE_IRQ,
  110. },
  111. };
  112. static struct omap_gpio_platform_data omap16xx_gpio2_config = {
  113. .bank_width = 16,
  114. .regs = &omap16xx_gpio_regs,
  115. };
  116. static struct platform_device omap16xx_gpio2 = {
  117. .name = "omap_gpio",
  118. .id = 2,
  119. .dev = {
  120. .platform_data = &omap16xx_gpio2_config,
  121. },
  122. .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
  123. .resource = omap16xx_gpio2_resources,
  124. };
  125. /* gpio3 */
  126. static struct resource omap16xx_gpio3_resources[] = {
  127. {
  128. .start = OMAP1610_GPIO3_BASE,
  129. .end = OMAP1610_GPIO3_BASE + SZ_2K - 1,
  130. .flags = IORESOURCE_MEM,
  131. },
  132. {
  133. .start = INT_1610_GPIO_BANK3,
  134. .flags = IORESOURCE_IRQ,
  135. },
  136. };
  137. static struct omap_gpio_platform_data omap16xx_gpio3_config = {
  138. .bank_width = 16,
  139. .regs = &omap16xx_gpio_regs,
  140. };
  141. static struct platform_device omap16xx_gpio3 = {
  142. .name = "omap_gpio",
  143. .id = 3,
  144. .dev = {
  145. .platform_data = &omap16xx_gpio3_config,
  146. },
  147. .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
  148. .resource = omap16xx_gpio3_resources,
  149. };
  150. /* gpio4 */
  151. static struct resource omap16xx_gpio4_resources[] = {
  152. {
  153. .start = OMAP1610_GPIO4_BASE,
  154. .end = OMAP1610_GPIO4_BASE + SZ_2K - 1,
  155. .flags = IORESOURCE_MEM,
  156. },
  157. {
  158. .start = INT_1610_GPIO_BANK4,
  159. .flags = IORESOURCE_IRQ,
  160. },
  161. };
  162. static struct omap_gpio_platform_data omap16xx_gpio4_config = {
  163. .bank_width = 16,
  164. .regs = &omap16xx_gpio_regs,
  165. };
  166. static struct platform_device omap16xx_gpio4 = {
  167. .name = "omap_gpio",
  168. .id = 4,
  169. .dev = {
  170. .platform_data = &omap16xx_gpio4_config,
  171. },
  172. .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
  173. .resource = omap16xx_gpio4_resources,
  174. };
  175. static struct platform_device *omap16xx_gpio_dev[] __initdata = {
  176. &omap16xx_mpu_gpio,
  177. &omap16xx_gpio1,
  178. &omap16xx_gpio2,
  179. &omap16xx_gpio3,
  180. &omap16xx_gpio4,
  181. };
  182. /*
  183. * omap16xx_gpio_init needs to be done before
  184. * machine_init functions access gpio APIs.
  185. * Hence omap16xx_gpio_init is a postcore_initcall.
  186. */
  187. static int __init omap16xx_gpio_init(void)
  188. {
  189. int i;
  190. void __iomem *base;
  191. struct resource *res;
  192. struct platform_device *pdev;
  193. struct omap_gpio_platform_data *pdata;
  194. if (!cpu_is_omap16xx())
  195. return -EINVAL;
  196. /*
  197. * Enable system clock for GPIO module.
  198. * The CAM_CLK_CTRL *is* really the right place.
  199. */
  200. omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
  201. ULPD_CAM_CLK_CTRL);
  202. for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
  203. pdev = omap16xx_gpio_dev[i];
  204. pdata = pdev->dev.platform_data;
  205. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  206. if (unlikely(!res)) {
  207. dev_err(&pdev->dev, "Invalid mem resource.\n");
  208. return -ENODEV;
  209. }
  210. base = ioremap(res->start, resource_size(res));
  211. if (unlikely(!base)) {
  212. dev_err(&pdev->dev, "ioremap failed.\n");
  213. return -ENOMEM;
  214. }
  215. __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
  216. iounmap(base);
  217. platform_device_register(omap16xx_gpio_dev[i]);
  218. }
  219. return 0;
  220. }
  221. postcore_initcall(omap16xx_gpio_init);