fpga.c 5.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/arch/arm/mach-omap1/fpga.c
  4. *
  5. * Interrupt handler for OMAP-1510 Innovator FPGA
  6. *
  7. * Copyright (C) 2001 RidgeRun, Inc.
  8. * Author: Greg Lonnon <[email protected]>
  9. *
  10. * Copyright (C) 2002 MontaVista Software, Inc.
  11. *
  12. * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
  13. * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <[email protected]>
  14. */
  15. #include <linux/types.h>
  16. #include <linux/gpio.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/device.h>
  20. #include <linux/errno.h>
  21. #include <linux/io.h>
  22. #include <asm/irq.h>
  23. #include <asm/mach/irq.h>
  24. #include "hardware.h"
  25. #include "iomap.h"
  26. #include "common.h"
  27. #include "fpga.h"
  28. static void fpga_mask_irq(struct irq_data *d)
  29. {
  30. unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
  31. if (irq < 8)
  32. __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
  33. & ~(1 << irq)), OMAP1510_FPGA_IMR_LO);
  34. else if (irq < 16)
  35. __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
  36. & ~(1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
  37. else
  38. __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
  39. & ~(1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
  40. }
  41. static inline u32 get_fpga_unmasked_irqs(void)
  42. {
  43. return
  44. ((__raw_readb(OMAP1510_FPGA_ISR_LO) &
  45. __raw_readb(OMAP1510_FPGA_IMR_LO))) |
  46. ((__raw_readb(OMAP1510_FPGA_ISR_HI) &
  47. __raw_readb(OMAP1510_FPGA_IMR_HI)) << 8) |
  48. ((__raw_readb(INNOVATOR_FPGA_ISR2) &
  49. __raw_readb(INNOVATOR_FPGA_IMR2)) << 16);
  50. }
  51. static void fpga_ack_irq(struct irq_data *d)
  52. {
  53. /* Don't need to explicitly ACK FPGA interrupts */
  54. }
  55. static void fpga_unmask_irq(struct irq_data *d)
  56. {
  57. unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
  58. if (irq < 8)
  59. __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
  60. OMAP1510_FPGA_IMR_LO);
  61. else if (irq < 16)
  62. __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
  63. | (1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
  64. else
  65. __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
  66. | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
  67. }
  68. static void fpga_mask_ack_irq(struct irq_data *d)
  69. {
  70. fpga_mask_irq(d);
  71. fpga_ack_irq(d);
  72. }
  73. static void innovator_fpga_IRQ_demux(struct irq_desc *desc)
  74. {
  75. u32 stat;
  76. int fpga_irq;
  77. stat = get_fpga_unmasked_irqs();
  78. if (!stat)
  79. return;
  80. for (fpga_irq = OMAP_FPGA_IRQ_BASE;
  81. (fpga_irq < OMAP_FPGA_IRQ_END) && stat;
  82. fpga_irq++, stat >>= 1) {
  83. if (stat & 1) {
  84. generic_handle_irq(fpga_irq);
  85. }
  86. }
  87. }
  88. static struct irq_chip omap_fpga_irq_ack = {
  89. .name = "FPGA-ack",
  90. .irq_ack = fpga_mask_ack_irq,
  91. .irq_mask = fpga_mask_irq,
  92. .irq_unmask = fpga_unmask_irq,
  93. };
  94. static struct irq_chip omap_fpga_irq = {
  95. .name = "FPGA",
  96. .irq_ack = fpga_ack_irq,
  97. .irq_mask = fpga_mask_irq,
  98. .irq_unmask = fpga_unmask_irq,
  99. };
  100. /*
  101. * All of the FPGA interrupt request inputs except for the touchscreen are
  102. * edge-sensitive; the touchscreen is level-sensitive. The edge-sensitive
  103. * interrupts are acknowledged as a side-effect of reading the interrupt
  104. * status register from the FPGA. The edge-sensitive interrupt inputs
  105. * cause a problem with level interrupt requests, such as Ethernet. The
  106. * problem occurs when a level interrupt request is asserted while its
  107. * interrupt input is masked in the FPGA, which results in a missed
  108. * interrupt.
  109. *
  110. * In an attempt to workaround the problem with missed interrupts, the
  111. * mask_ack routine for all of the FPGA interrupts has been changed from
  112. * fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt
  113. * being serviced is left unmasked. We can do this because the FPGA cascade
  114. * interrupt is run with all interrupts masked.
  115. *
  116. * Limited testing indicates that this workaround appears to be effective
  117. * for the smc9194 Ethernet driver used on the Innovator. It should work
  118. * on other FPGA interrupts as well, but any drivers that explicitly mask
  119. * interrupts at the interrupt controller via disable_irq/enable_irq
  120. * could pose a problem.
  121. */
  122. void omap1510_fpga_init_irq(void)
  123. {
  124. int i, res;
  125. __raw_writeb(0, OMAP1510_FPGA_IMR_LO);
  126. __raw_writeb(0, OMAP1510_FPGA_IMR_HI);
  127. __raw_writeb(0, INNOVATOR_FPGA_IMR2);
  128. for (i = OMAP_FPGA_IRQ_BASE; i < OMAP_FPGA_IRQ_END; i++) {
  129. if (i == OMAP1510_INT_FPGA_TS) {
  130. /*
  131. * The touchscreen interrupt is level-sensitive, so
  132. * we'll use the regular mask_ack routine for it.
  133. */
  134. irq_set_chip(i, &omap_fpga_irq_ack);
  135. }
  136. else {
  137. /*
  138. * All FPGA interrupts except the touchscreen are
  139. * edge-sensitive, so we won't mask them.
  140. */
  141. irq_set_chip(i, &omap_fpga_irq);
  142. }
  143. irq_set_handler(i, handle_edge_irq);
  144. irq_clear_status_flags(i, IRQ_NOREQUEST);
  145. }
  146. /*
  147. * The FPGA interrupt line is connected to GPIO13. Claim this pin for
  148. * the ARM.
  149. *
  150. * NOTE: For general GPIO/MPUIO access and interrupts, please see
  151. * gpio.[ch]
  152. */
  153. res = gpio_request(13, "FPGA irq");
  154. if (res) {
  155. pr_err("%s failed to get gpio\n", __func__);
  156. return;
  157. }
  158. gpio_direction_input(13);
  159. irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
  160. irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
  161. }