pm-board.c 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Board-level suspend/resume support.
  4. *
  5. * Copyright (C) 2014-2015 Marvell
  6. *
  7. * Thomas Petazzoni <[email protected]>
  8. */
  9. #include <linux/delay.h>
  10. #include <linux/gpio.h>
  11. #include <linux/init.h>
  12. #include <linux/io.h>
  13. #include <linux/of.h>
  14. #include <linux/of_address.h>
  15. #include <linux/of_gpio.h>
  16. #include <linux/slab.h>
  17. #include "common.h"
  18. #define ARMADA_PIC_NR_GPIOS 3
  19. static void __iomem *gpio_ctrl;
  20. static int pic_gpios[ARMADA_PIC_NR_GPIOS];
  21. static int pic_raw_gpios[ARMADA_PIC_NR_GPIOS];
  22. static void mvebu_armada_pm_enter(void __iomem *sdram_reg, u32 srcmd)
  23. {
  24. u32 reg, ackcmd;
  25. int i;
  26. /* Put 001 as value on the GPIOs */
  27. reg = readl(gpio_ctrl);
  28. for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++)
  29. reg &= ~BIT(pic_raw_gpios[i]);
  30. reg |= BIT(pic_raw_gpios[0]);
  31. writel(reg, gpio_ctrl);
  32. /* Prepare writing 111 to the GPIOs */
  33. ackcmd = readl(gpio_ctrl);
  34. for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++)
  35. ackcmd |= BIT(pic_raw_gpios[i]);
  36. srcmd = cpu_to_le32(srcmd);
  37. ackcmd = cpu_to_le32(ackcmd);
  38. /*
  39. * Wait a while, the PIC needs quite a bit of time between the
  40. * two GPIO commands.
  41. */
  42. mdelay(3000);
  43. asm volatile (
  44. /* Align to a cache line */
  45. ".balign 32\n\t"
  46. /* Enter self refresh */
  47. "str %[srcmd], [%[sdram_reg]]\n\t"
  48. /*
  49. * Wait 100 cycles for DDR to enter self refresh, by
  50. * doing 50 times two instructions.
  51. */
  52. "mov r1, #50\n\t"
  53. "1: subs r1, r1, #1\n\t"
  54. "bne 1b\n\t"
  55. /* Issue the command ACK */
  56. "str %[ackcmd], [%[gpio_ctrl]]\n\t"
  57. /* Trap the processor */
  58. "b .\n\t"
  59. : : [srcmd] "r" (srcmd), [sdram_reg] "r" (sdram_reg),
  60. [ackcmd] "r" (ackcmd), [gpio_ctrl] "r" (gpio_ctrl) : "r1");
  61. }
  62. static int __init mvebu_armada_pm_init(void)
  63. {
  64. struct device_node *np;
  65. struct device_node *gpio_ctrl_np = NULL;
  66. int ret = 0, i;
  67. if (!of_machine_is_compatible("marvell,axp-gp"))
  68. return -ENODEV;
  69. np = of_find_node_by_name(NULL, "pm_pic");
  70. if (!np)
  71. return -ENODEV;
  72. for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++) {
  73. char *name;
  74. struct of_phandle_args args;
  75. pic_gpios[i] = of_get_named_gpio(np, "ctrl-gpios", i);
  76. if (pic_gpios[i] < 0) {
  77. ret = -ENODEV;
  78. goto out;
  79. }
  80. name = kasprintf(GFP_KERNEL, "pic-pin%d", i);
  81. if (!name) {
  82. ret = -ENOMEM;
  83. goto out;
  84. }
  85. ret = gpio_request(pic_gpios[i], name);
  86. if (ret < 0) {
  87. kfree(name);
  88. goto out;
  89. }
  90. ret = gpio_direction_output(pic_gpios[i], 0);
  91. if (ret < 0) {
  92. gpio_free(pic_gpios[i]);
  93. kfree(name);
  94. goto out;
  95. }
  96. ret = of_parse_phandle_with_fixed_args(np, "ctrl-gpios", 2,
  97. i, &args);
  98. if (ret < 0) {
  99. gpio_free(pic_gpios[i]);
  100. kfree(name);
  101. goto out;
  102. }
  103. if (gpio_ctrl_np)
  104. of_node_put(gpio_ctrl_np);
  105. gpio_ctrl_np = args.np;
  106. pic_raw_gpios[i] = args.args[0];
  107. }
  108. gpio_ctrl = of_iomap(gpio_ctrl_np, 0);
  109. if (!gpio_ctrl) {
  110. ret = -ENOMEM;
  111. goto out;
  112. }
  113. mvebu_pm_suspend_init(mvebu_armada_pm_enter);
  114. out:
  115. of_node_put(np);
  116. of_node_put(gpio_ctrl_np);
  117. return ret;
  118. }
  119. /*
  120. * Registering the mvebu_board_pm_enter callback must be done before
  121. * the platform_suspend_ops will be registered. In the same time we
  122. * also need to have the gpio devices registered. That's why we use a
  123. * device_initcall_sync which is called after all the device_initcall
  124. * (used by the gpio device) but before the late_initcall (used to
  125. * register the platform_suspend_ops)
  126. */
  127. device_initcall_sync(mvebu_armada_pm_init);