cpu.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/err.h>
  3. #include <linux/module.h>
  4. #include <linux/io.h>
  5. #include <linux/of.h>
  6. #include <linux/of_address.h>
  7. #include "hardware.h"
  8. #include "common.h"
  9. unsigned int __mxc_cpu_type;
  10. static unsigned int imx_soc_revision;
  11. void mxc_set_cpu_type(unsigned int type)
  12. {
  13. __mxc_cpu_type = type;
  14. }
  15. void imx_set_soc_revision(unsigned int rev)
  16. {
  17. imx_soc_revision = rev;
  18. }
  19. unsigned int imx_get_soc_revision(void)
  20. {
  21. return imx_soc_revision;
  22. }
  23. void imx_print_silicon_rev(const char *cpu, int srev)
  24. {
  25. if (srev == IMX_CHIP_REVISION_UNKNOWN)
  26. pr_info("CPU identified as %s, unknown revision\n", cpu);
  27. else
  28. pr_info("CPU identified as %s, silicon rev %d.%d\n",
  29. cpu, (srev >> 4) & 0xf, srev & 0xf);
  30. }
  31. void __init imx_set_aips(void __iomem *base)
  32. {
  33. unsigned int reg;
  34. /*
  35. * Set all MPROTx to be non-bufferable, trusted for R/W,
  36. * not forced to user-mode.
  37. */
  38. imx_writel(0x77777777, base + 0x0);
  39. imx_writel(0x77777777, base + 0x4);
  40. /*
  41. * Set all OPACRx to be non-bufferable, to not require
  42. * supervisor privilege level for access, allow for
  43. * write access and untrusted master access.
  44. */
  45. imx_writel(0x0, base + 0x40);
  46. imx_writel(0x0, base + 0x44);
  47. imx_writel(0x0, base + 0x48);
  48. imx_writel(0x0, base + 0x4C);
  49. reg = imx_readl(base + 0x50) & 0x00FFFFFF;
  50. imx_writel(reg, base + 0x50);
  51. }
  52. void __init imx_aips_allow_unprivileged_access(
  53. const char *compat)
  54. {
  55. void __iomem *aips_base_addr;
  56. struct device_node *np;
  57. for_each_compatible_node(np, NULL, compat) {
  58. aips_base_addr = of_iomap(np, 0);
  59. WARN_ON(!aips_base_addr);
  60. imx_set_aips(aips_base_addr);
  61. }
  62. }