cpu-imx27.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
  4. * Copyright 2008 Juergen Beisert, [email protected]
  5. */
  6. /*
  7. * i.MX27 specific CPU detection code
  8. */
  9. #include <linux/io.h>
  10. #include <linux/of_address.h>
  11. #include <linux/module.h>
  12. #include "hardware.h"
  13. static int mx27_cpu_rev = -1;
  14. static int mx27_cpu_partnumber;
  15. #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
  16. #define SYSCTRL_OFFSET 0x800 /* Offset from CCM base address */
  17. static int mx27_read_cpu_rev(void)
  18. {
  19. void __iomem *ccm_base;
  20. struct device_node *np;
  21. u32 val;
  22. np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
  23. ccm_base = of_iomap(np, 0);
  24. of_node_put(np);
  25. BUG_ON(!ccm_base);
  26. /*
  27. * now we have access to the IO registers. As we need
  28. * the silicon revision very early we read it here to
  29. * avoid any further hooks
  30. */
  31. val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID);
  32. mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
  33. switch (val >> 28) {
  34. case 0:
  35. return IMX_CHIP_REVISION_1_0;
  36. case 1:
  37. return IMX_CHIP_REVISION_2_0;
  38. case 2:
  39. return IMX_CHIP_REVISION_2_1;
  40. default:
  41. return IMX_CHIP_REVISION_UNKNOWN;
  42. }
  43. }
  44. /*
  45. * Returns:
  46. * the silicon revision of the cpu
  47. * -EINVAL - not a mx27
  48. */
  49. int mx27_revision(void)
  50. {
  51. if (mx27_cpu_rev == -1)
  52. mx27_cpu_rev = mx27_read_cpu_rev();
  53. if (mx27_cpu_partnumber != 0x8821)
  54. return -EINVAL;
  55. return mx27_cpu_rev;
  56. }
  57. EXPORT_SYMBOL(mx27_revision);