smc.h 1.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2012 Samsung Electronics.
  4. *
  5. * Exynos - SMC Call
  6. */
  7. #ifndef __ASM_ARCH_EXYNOS_SMC_H
  8. #define __ASM_ARCH_EXYNOS_SMC_H
  9. #define SMC_CMD_INIT (-1)
  10. #define SMC_CMD_INFO (-2)
  11. /* For Power Management */
  12. #define SMC_CMD_SLEEP (-3)
  13. #define SMC_CMD_CPU1BOOT (-4)
  14. #define SMC_CMD_CPU0AFTR (-5)
  15. #define SMC_CMD_SAVE (-6)
  16. #define SMC_CMD_SHUTDOWN (-7)
  17. /* For CP15 Access */
  18. #define SMC_CMD_C15RESUME (-11)
  19. /* For L2 Cache Access */
  20. #define SMC_CMD_L2X0CTRL (-21)
  21. #define SMC_CMD_L2X0SETUP1 (-22)
  22. #define SMC_CMD_L2X0SETUP2 (-23)
  23. #define SMC_CMD_L2X0INVALL (-24)
  24. #define SMC_CMD_L2X0DEBUG (-25)
  25. /* For Accessing CP15/SFR (General) */
  26. #define SMC_CMD_REG (-101)
  27. /* defines for SMC_CMD_REG */
  28. #define SMC_REG_CLASS_SFR_W (0x1 << 30)
  29. #define SMC_REG_ID_SFR_W(addr) (SMC_REG_CLASS_SFR_W | ((addr) >> 2))
  30. #ifndef __ASSEMBLY__
  31. extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
  32. #endif /* __ASSEMBLY__ */
  33. /* op type for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
  34. #define OP_TYPE_CORE 0x0
  35. #define OP_TYPE_CLUSTER 0x1
  36. /* Power State required for SMC_CMD_SAVE and SMC_CMD_SHUTDOWN */
  37. #define SMC_POWERSTATE_IDLE 0x1
  38. #endif