dma.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * arch/arm/mach-ep93xx/dma.c
  4. *
  5. * Platform support code for the EP93xx dmaengine driver.
  6. *
  7. * Copyright (C) 2011 Mika Westerberg
  8. *
  9. * This work is based on the original dma-m2p implementation with
  10. * following copyrights:
  11. *
  12. * Copyright (C) 2006 Lennert Buytenhek <[email protected]>
  13. * Copyright (C) 2006 Applied Data Systems
  14. * Copyright (C) 2009 Ryan Mallon <[email protected]>
  15. */
  16. #include <linux/dmaengine.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/init.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/kernel.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/platform_data/dma-ep93xx.h>
  23. #include "hardware.h"
  24. #include "soc.h"
  25. #define DMA_CHANNEL(_name, _base, _irq) \
  26. { .name = (_name), .base = (_base), .irq = (_irq) }
  27. /*
  28. * DMA M2P channels.
  29. *
  30. * On the EP93xx chip the following peripherals my be allocated to the 10
  31. * Memory to Internal Peripheral (M2P) channels (5 transmit + 5 receive).
  32. *
  33. * I2S contains 3 Tx and 3 Rx DMA Channels
  34. * AAC contains 3 Tx and 3 Rx DMA Channels
  35. * UART1 contains 1 Tx and 1 Rx DMA Channels
  36. * UART2 contains 1 Tx and 1 Rx DMA Channels
  37. * UART3 contains 1 Tx and 1 Rx DMA Channels
  38. * IrDA contains 1 Tx and 1 Rx DMA Channels
  39. *
  40. * Registers are mapped statically in ep93xx_map_io().
  41. */
  42. static struct ep93xx_dma_chan_data ep93xx_dma_m2p_channels[] = {
  43. DMA_CHANNEL("m2p0", EP93XX_DMA_BASE + 0x0000, IRQ_EP93XX_DMAM2P0),
  44. DMA_CHANNEL("m2p1", EP93XX_DMA_BASE + 0x0040, IRQ_EP93XX_DMAM2P1),
  45. DMA_CHANNEL("m2p2", EP93XX_DMA_BASE + 0x0080, IRQ_EP93XX_DMAM2P2),
  46. DMA_CHANNEL("m2p3", EP93XX_DMA_BASE + 0x00c0, IRQ_EP93XX_DMAM2P3),
  47. DMA_CHANNEL("m2p4", EP93XX_DMA_BASE + 0x0240, IRQ_EP93XX_DMAM2P4),
  48. DMA_CHANNEL("m2p5", EP93XX_DMA_BASE + 0x0200, IRQ_EP93XX_DMAM2P5),
  49. DMA_CHANNEL("m2p6", EP93XX_DMA_BASE + 0x02c0, IRQ_EP93XX_DMAM2P6),
  50. DMA_CHANNEL("m2p7", EP93XX_DMA_BASE + 0x0280, IRQ_EP93XX_DMAM2P7),
  51. DMA_CHANNEL("m2p8", EP93XX_DMA_BASE + 0x0340, IRQ_EP93XX_DMAM2P8),
  52. DMA_CHANNEL("m2p9", EP93XX_DMA_BASE + 0x0300, IRQ_EP93XX_DMAM2P9),
  53. };
  54. static struct ep93xx_dma_platform_data ep93xx_dma_m2p_data = {
  55. .channels = ep93xx_dma_m2p_channels,
  56. .num_channels = ARRAY_SIZE(ep93xx_dma_m2p_channels),
  57. };
  58. static u64 ep93xx_dma_m2p_mask = DMA_BIT_MASK(32);
  59. static struct platform_device ep93xx_dma_m2p_device = {
  60. .name = "ep93xx-dma-m2p",
  61. .id = -1,
  62. .dev = {
  63. .platform_data = &ep93xx_dma_m2p_data,
  64. .dma_mask = &ep93xx_dma_m2p_mask,
  65. .coherent_dma_mask = DMA_BIT_MASK(32),
  66. },
  67. };
  68. /*
  69. * DMA M2M channels.
  70. *
  71. * There are 2 M2M channels which support memcpy/memset and in addition simple
  72. * hardware requests from/to SSP and IDE. We do not implement an external
  73. * hardware requests.
  74. *
  75. * Registers are mapped statically in ep93xx_map_io().
  76. */
  77. static struct ep93xx_dma_chan_data ep93xx_dma_m2m_channels[] = {
  78. DMA_CHANNEL("m2m0", EP93XX_DMA_BASE + 0x0100, IRQ_EP93XX_DMAM2M0),
  79. DMA_CHANNEL("m2m1", EP93XX_DMA_BASE + 0x0140, IRQ_EP93XX_DMAM2M1),
  80. };
  81. static struct ep93xx_dma_platform_data ep93xx_dma_m2m_data = {
  82. .channels = ep93xx_dma_m2m_channels,
  83. .num_channels = ARRAY_SIZE(ep93xx_dma_m2m_channels),
  84. };
  85. static u64 ep93xx_dma_m2m_mask = DMA_BIT_MASK(32);
  86. static struct platform_device ep93xx_dma_m2m_device = {
  87. .name = "ep93xx-dma-m2m",
  88. .id = -1,
  89. .dev = {
  90. .platform_data = &ep93xx_dma_m2m_data,
  91. .dma_mask = &ep93xx_dma_m2m_mask,
  92. .coherent_dma_mask = DMA_BIT_MASK(32),
  93. },
  94. };
  95. static int __init ep93xx_dma_init(void)
  96. {
  97. platform_device_register(&ep93xx_dma_m2p_device);
  98. platform_device_register(&ep93xx_dma_m2m_device);
  99. return 0;
  100. }
  101. arch_initcall(ep93xx_dma_init);