entry-v7m.S 3.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * linux/arch/arm/kernel/entry-v7m.S
  4. *
  5. * Copyright (C) 2008 ARM Ltd.
  6. *
  7. * Low-level vector interface routines for the ARMv7-M architecture
  8. */
  9. #include <asm/memory.h>
  10. #include <asm/glue.h>
  11. #include <asm/thread_notify.h>
  12. #include <asm/v7m.h>
  13. #include "entry-header.S"
  14. #ifdef CONFIG_TRACE_IRQFLAGS
  15. #error "CONFIG_TRACE_IRQFLAGS not supported on the current ARMv7M implementation"
  16. #endif
  17. __invalid_entry:
  18. v7m_exception_entry
  19. #ifdef CONFIG_PRINTK
  20. adr r0, strerr
  21. mrs r1, ipsr
  22. mov r2, lr
  23. bl _printk
  24. #endif
  25. mov r0, sp
  26. bl show_regs
  27. 1: b 1b
  28. ENDPROC(__invalid_entry)
  29. strerr: .asciz "\nUnhandled exception: IPSR = %08lx LR = %08lx\n"
  30. .align 2
  31. __irq_entry:
  32. v7m_exception_entry
  33. @
  34. @ Invoke the IRQ handler
  35. @
  36. mov r0, sp
  37. ldr_this_cpu sp, irq_stack_ptr, r1, r2
  38. @
  39. @ If we took the interrupt while running in the kernel, we may already
  40. @ be using the IRQ stack, so revert to the original value in that case.
  41. @
  42. subs r2, sp, r0 @ SP above bottom of IRQ stack?
  43. rsbscs r2, r2, #THREAD_SIZE @ ... and below the top?
  44. movcs sp, r0
  45. push {r0, lr} @ preserve LR and original SP
  46. @ routine called with r0 = struct pt_regs *
  47. bl generic_handle_arch_irq
  48. pop {r0, lr}
  49. mov sp, r0
  50. @
  51. @ Check for any pending work if returning to user
  52. @
  53. ldr r1, =BASEADDR_V7M_SCB
  54. ldr r0, [r1, V7M_SCB_ICSR]
  55. tst r0, V7M_SCB_ICSR_RETTOBASE
  56. beq 2f
  57. get_thread_info tsk
  58. ldr r2, [tsk, #TI_FLAGS]
  59. movs r2, r2, lsl #16
  60. beq 2f @ no work pending
  61. mov r0, #V7M_SCB_ICSR_PENDSVSET
  62. str r0, [r1, V7M_SCB_ICSR] @ raise PendSV
  63. 2:
  64. @ registers r0-r3 and r12 are automatically restored on exception
  65. @ return. r4-r7 were not clobbered in v7m_exception_entry so for
  66. @ correctness they don't need to be restored. So only r8-r11 must be
  67. @ restored here. The easiest way to do so is to restore r0-r7, too.
  68. ldmia sp!, {r0-r11}
  69. add sp, #PT_REGS_SIZE-S_IP
  70. cpsie i
  71. bx lr
  72. ENDPROC(__irq_entry)
  73. __pendsv_entry:
  74. v7m_exception_entry
  75. ldr r1, =BASEADDR_V7M_SCB
  76. mov r0, #V7M_SCB_ICSR_PENDSVCLR
  77. str r0, [r1, V7M_SCB_ICSR] @ clear PendSV
  78. @ execute the pending work, including reschedule
  79. get_thread_info tsk
  80. mov why, #0
  81. b ret_to_user_from_irq
  82. ENDPROC(__pendsv_entry)
  83. /*
  84. * Register switch for ARMv7-M processors.
  85. * r0 = previous task_struct, r1 = previous thread_info, r2 = next thread_info
  86. * previous and next are guaranteed not to be the same.
  87. */
  88. ENTRY(__switch_to)
  89. .fnstart
  90. .cantunwind
  91. add ip, r1, #TI_CPU_SAVE
  92. stmia ip!, {r4 - r11} @ Store most regs on stack
  93. str sp, [ip], #4
  94. str lr, [ip], #4
  95. mov r5, r0
  96. mov r6, r2 @ Preserve 'next'
  97. add r4, r2, #TI_CPU_SAVE
  98. ldr r0, =thread_notify_head
  99. mov r1, #THREAD_NOTIFY_SWITCH
  100. bl atomic_notifier_call_chain
  101. mov r0, r5
  102. mov r1, r6
  103. ldmia r4, {r4 - r12, lr} @ Load all regs saved previously
  104. set_current r1, r2
  105. mov sp, ip
  106. bx lr
  107. .fnend
  108. ENDPROC(__switch_to)
  109. .data
  110. #if CONFIG_CPU_V7M_NUM_IRQ <= 112
  111. .align 9
  112. #else
  113. .align 10
  114. #endif
  115. /*
  116. * Vector table (Natural alignment need to be ensured)
  117. */
  118. ENTRY(vector_table)
  119. .long 0 @ 0 - Reset stack pointer
  120. .long __invalid_entry @ 1 - Reset
  121. .long __invalid_entry @ 2 - NMI
  122. .long __invalid_entry @ 3 - HardFault
  123. .long __invalid_entry @ 4 - MemManage
  124. .long __invalid_entry @ 5 - BusFault
  125. .long __invalid_entry @ 6 - UsageFault
  126. .long __invalid_entry @ 7 - Reserved
  127. .long __invalid_entry @ 8 - Reserved
  128. .long __invalid_entry @ 9 - Reserved
  129. .long __invalid_entry @ 10 - Reserved
  130. .long vector_swi @ 11 - SVCall
  131. .long __invalid_entry @ 12 - Debug Monitor
  132. .long __invalid_entry @ 13 - Reserved
  133. .long __pendsv_entry @ 14 - PendSV
  134. .long __invalid_entry @ 15 - SysTick
  135. .rept CONFIG_CPU_V7M_NUM_IRQ
  136. .long __irq_entry @ External Interrupts
  137. .endr
  138. .align 2
  139. .globl exc_ret
  140. exc_ret:
  141. .space 4