icedcc.S 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * arch/arm/include/debug/icedcc.S
  4. *
  5. * Copyright (C) 1994-1999 Russell King
  6. */
  7. @@ debug using ARM EmbeddedICE DCC channel
  8. .macro addruart, rp, rv, tmp
  9. .endm
  10. #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
  11. .macro senduart, rd, rx
  12. mcr p14, 0, \rd, c0, c5, 0
  13. .endm
  14. .macro busyuart, rd, rx
  15. 1001:
  16. mrc p14, 0, \rx, c0, c1, 0
  17. tst \rx, #0x20000000
  18. beq 1001b
  19. .endm
  20. .macro waituartcts, rd, rx
  21. .endm
  22. .macro waituarttxrdy, rd, rx
  23. mov \rd, #0x2000000
  24. 1001:
  25. subs \rd, \rd, #1
  26. bmi 1002f
  27. mrc p14, 0, \rx, c0, c1, 0
  28. tst \rx, #0x20000000
  29. bne 1001b
  30. 1002:
  31. .endm
  32. #elif defined(CONFIG_CPU_XSCALE)
  33. .macro senduart, rd, rx
  34. mcr p14, 0, \rd, c8, c0, 0
  35. .endm
  36. .macro busyuart, rd, rx
  37. 1001:
  38. mrc p14, 0, \rx, c14, c0, 0
  39. tst \rx, #0x10000000
  40. beq 1001b
  41. .endm
  42. .macro waituartcts, rd, rx
  43. .endm
  44. .macro waituarttxrdy, rd, rx
  45. mov \rd, #0x10000000
  46. 1001:
  47. subs \rd, \rd, #1
  48. bmi 1002f
  49. mrc p14, 0, \rx, c14, c0, 0
  50. tst \rx, #0x10000000
  51. bne 1001b
  52. 1002:
  53. .endm
  54. #else
  55. .macro senduart, rd, rx
  56. mcr p14, 0, \rd, c1, c0, 0
  57. .endm
  58. .macro busyuart, rd, rx
  59. 1001:
  60. mrc p14, 0, \rx, c0, c0, 0
  61. tst \rx, #2
  62. beq 1001b
  63. .endm
  64. .macro waituartcts, rd, rx
  65. .endm
  66. .macro waituarttxrdy, rd, rx
  67. mov \rd, #0x2000000
  68. 1001:
  69. subs \rd, \rd, #1
  70. bmi 1002f
  71. mrc p14, 0, \rx, c0, c0, 0
  72. tst \rx, #2
  73. bne 1001b
  74. 1002:
  75. .endm
  76. #endif /* CONFIG_CPU_V6 */