smp_plat.h 2.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * ARM specific SMP header, this contains our implementation
  4. * details.
  5. */
  6. #ifndef __ASMARM_SMP_PLAT_H
  7. #define __ASMARM_SMP_PLAT_H
  8. #include <linux/cpumask.h>
  9. #include <linux/err.h>
  10. #include <asm/cpu.h>
  11. #include <asm/cputype.h>
  12. /*
  13. * Return true if we are running on a SMP platform
  14. */
  15. static inline bool is_smp(void)
  16. {
  17. #ifndef CONFIG_SMP
  18. return false;
  19. #elif defined(CONFIG_SMP_ON_UP)
  20. extern unsigned int smp_on_up;
  21. return !!smp_on_up;
  22. #else
  23. return true;
  24. #endif
  25. }
  26. /**
  27. * smp_cpuid_part() - return part id for a given cpu
  28. * @cpu: logical cpu id.
  29. *
  30. * Return: part id of logical cpu passed as argument.
  31. */
  32. static inline unsigned int smp_cpuid_part(int cpu)
  33. {
  34. struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
  35. return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
  36. read_cpuid_part();
  37. }
  38. /* all SMP configurations have the extended CPUID registers */
  39. #ifndef CONFIG_MMU
  40. #define tlb_ops_need_broadcast() 0
  41. #else
  42. static inline int tlb_ops_need_broadcast(void)
  43. {
  44. if (!is_smp())
  45. return 0;
  46. return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
  47. }
  48. #endif
  49. #if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7
  50. #define cache_ops_need_broadcast() 0
  51. #else
  52. static inline int cache_ops_need_broadcast(void)
  53. {
  54. if (!is_smp())
  55. return 0;
  56. return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1;
  57. }
  58. #endif
  59. /*
  60. * Logical CPU mapping.
  61. */
  62. extern u32 __cpu_logical_map[];
  63. #define cpu_logical_map(cpu) __cpu_logical_map[cpu]
  64. /*
  65. * Retrieve logical cpu index corresponding to a given MPIDR[23:0]
  66. * - mpidr: MPIDR[23:0] to be used for the look-up
  67. *
  68. * Returns the cpu logical index or -EINVAL on look-up error
  69. */
  70. static inline int get_logical_index(u32 mpidr)
  71. {
  72. int cpu;
  73. for (cpu = 0; cpu < nr_cpu_ids; cpu++)
  74. if (cpu_logical_map(cpu) == mpidr)
  75. return cpu;
  76. return -EINVAL;
  77. }
  78. /*
  79. * NOTE ! Assembly code relies on the following
  80. * structure memory layout in order to carry out load
  81. * multiple from its base address. For more
  82. * information check arch/arm/kernel/sleep.S
  83. */
  84. struct mpidr_hash {
  85. u32 mask; /* used by sleep.S */
  86. u32 shift_aff[3]; /* used by sleep.S */
  87. u32 bits;
  88. };
  89. extern struct mpidr_hash mpidr_hash;
  90. static inline u32 mpidr_hash_size(void)
  91. {
  92. return 1 << mpidr_hash.bits;
  93. }
  94. extern int platform_can_secondary_boot(void);
  95. extern int platform_can_cpu_hotplug(void);
  96. #ifdef CONFIG_HOTPLUG_CPU
  97. extern int platform_can_hotplug_cpu(unsigned int cpu);
  98. #else
  99. static inline int platform_can_hotplug_cpu(unsigned int cpu)
  100. {
  101. return 0;
  102. }
  103. #endif
  104. #endif