sun8i-v3.dtsi 1.2 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2019 Icenowy Zheng <[email protected]>
  4. * Copyright (C) 2021 Tobias Schramm <[email protected]>
  5. */
  6. #include "sun8i-v3s.dtsi"
  7. / {
  8. soc {
  9. i2s0: i2s@1c22000 {
  10. #sound-dai-cells = <0>;
  11. compatible = "allwinner,sun8i-v3-i2s",
  12. "allwinner,sun8i-h3-i2s";
  13. reg = <0x01c22000 0x400>;
  14. interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
  15. clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
  16. clock-names = "apb", "mod";
  17. dmas = <&dma 3>, <&dma 3>;
  18. dma-names = "rx", "tx";
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&i2s0_pins>;
  21. resets = <&ccu RST_BUS_I2S0>;
  22. status = "disabled";
  23. };
  24. };
  25. };
  26. &ccu {
  27. compatible = "allwinner,sun8i-v3-ccu";
  28. };
  29. &codec_analog {
  30. compatible = "allwinner,sun8i-v3-codec-analog",
  31. "allwinner,sun8i-h3-codec-analog";
  32. };
  33. &emac {
  34. /delete-property/ phy-handle;
  35. /delete-property/ phy-mode;
  36. };
  37. &mdio_mux {
  38. external_mdio: mdio@2 {
  39. reg = <2>;
  40. #address-cells = <1>;
  41. #size-cells = <0>;
  42. };
  43. };
  44. &pio {
  45. compatible = "allwinner,sun8i-v3-pinctrl";
  46. i2s0_pins: i2s0-pins {
  47. pins = "PG10", "PG11", "PG12", "PG13";
  48. function = "i2s";
  49. };
  50. uart1_pg_pins: uart1-pg-pins {
  51. pins = "PG6", "PG7";
  52. function = "uart1";
  53. };
  54. };