stm32mp13-pinctrl.dtsi 4.4 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2. /*
  3. * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
  4. * Author: Alexandre Torgue <[email protected]>
  5. */
  6. #include <dt-bindings/pinctrl/stm32-pinfunc.h>
  7. &pinctrl {
  8. i2c1_pins_a: i2c1-0 {
  9. pins {
  10. pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
  11. <STM32_PINMUX('E', 8, AF5)>; /* I2C1_SDA */
  12. bias-disable;
  13. drive-open-drain;
  14. slew-rate = <0>;
  15. };
  16. };
  17. i2c1_sleep_pins_a: i2c1-sleep-0 {
  18. pins {
  19. pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
  20. <STM32_PINMUX('E', 8, ANALOG)>; /* I2C1_SDA */
  21. };
  22. };
  23. i2c5_pins_a: i2c5-0 {
  24. pins {
  25. pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
  26. <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */
  27. bias-disable;
  28. drive-open-drain;
  29. slew-rate = <0>;
  30. };
  31. };
  32. i2c5_sleep_pins_a: i2c5-sleep-0 {
  33. pins {
  34. pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
  35. <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */
  36. };
  37. };
  38. sdmmc1_b4_pins_a: sdmmc1-b4-0 {
  39. pins {
  40. pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  41. <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  42. <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  43. <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
  44. <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  45. slew-rate = <1>;
  46. drive-push-pull;
  47. bias-disable;
  48. };
  49. };
  50. sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
  51. pins1 {
  52. pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
  53. <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
  54. <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
  55. <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
  56. slew-rate = <1>;
  57. drive-push-pull;
  58. bias-disable;
  59. };
  60. pins2 {
  61. pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
  62. slew-rate = <1>;
  63. drive-open-drain;
  64. bias-disable;
  65. };
  66. };
  67. sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
  68. pins {
  69. pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
  70. <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
  71. <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
  72. <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
  73. <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
  74. <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
  75. };
  76. };
  77. sdmmc1_clk_pins_a: sdmmc1-clk-0 {
  78. pins {
  79. pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
  80. slew-rate = <1>;
  81. drive-push-pull;
  82. bias-disable;
  83. };
  84. };
  85. sdmmc2_b4_pins_a: sdmmc2-b4-0 {
  86. pins {
  87. pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
  88. <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
  89. <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
  90. <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
  91. <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
  92. slew-rate = <1>;
  93. drive-push-pull;
  94. bias-pull-up;
  95. };
  96. };
  97. sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
  98. pins1 {
  99. pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
  100. <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
  101. <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
  102. <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
  103. slew-rate = <1>;
  104. drive-push-pull;
  105. bias-pull-up;
  106. };
  107. pins2 {
  108. pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
  109. slew-rate = <1>;
  110. drive-open-drain;
  111. bias-pull-up;
  112. };
  113. };
  114. sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
  115. pins {
  116. pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
  117. <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
  118. <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
  119. <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
  120. <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
  121. <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
  122. };
  123. };
  124. sdmmc2_clk_pins_a: sdmmc2-clk-0 {
  125. pins {
  126. pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
  127. slew-rate = <1>;
  128. drive-push-pull;
  129. bias-pull-up;
  130. };
  131. };
  132. spi5_pins_a: spi5-0 {
  133. pins1 {
  134. pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */
  135. <STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */
  136. bias-disable;
  137. drive-push-pull;
  138. slew-rate = <1>;
  139. };
  140. pins2 {
  141. pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */
  142. bias-disable;
  143. };
  144. };
  145. spi5_sleep_pins_a: spi5-sleep-0 {
  146. pins {
  147. pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */
  148. <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */
  149. <STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */
  150. };
  151. };
  152. uart4_pins_a: uart4-0 {
  153. pins1 {
  154. pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
  155. bias-disable;
  156. drive-push-pull;
  157. slew-rate = <0>;
  158. };
  159. pins2 {
  160. pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
  161. bias-disable;
  162. };
  163. };
  164. };