spear600.dtsi 4.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2012 Stefan Roese <[email protected]>
  4. */
  5. / {
  6. #address-cells = <1>;
  7. #size-cells = <1>;
  8. compatible = "st,spear600";
  9. cpus {
  10. #address-cells = <0>;
  11. #size-cells = <0>;
  12. cpu {
  13. compatible = "arm,arm926ej-s";
  14. device_type = "cpu";
  15. };
  16. };
  17. memory {
  18. device_type = "memory";
  19. reg = <0 0x40000000>;
  20. };
  21. ahb {
  22. #address-cells = <1>;
  23. #size-cells = <1>;
  24. compatible = "simple-bus";
  25. ranges = <0xd0000000 0xd0000000 0x30000000>;
  26. vic0: interrupt-controller@f1100000 {
  27. compatible = "arm,pl190-vic";
  28. interrupt-controller;
  29. reg = <0xf1100000 0x1000>;
  30. #interrupt-cells = <1>;
  31. };
  32. vic1: interrupt-controller@f1000000 {
  33. compatible = "arm,pl190-vic";
  34. interrupt-controller;
  35. reg = <0xf1000000 0x1000>;
  36. #interrupt-cells = <1>;
  37. };
  38. clcd: clcd@fc200000 {
  39. compatible = "arm,pl110", "arm,primecell";
  40. reg = <0xfc200000 0x1000>;
  41. interrupt-parent = <&vic1>;
  42. interrupts = <13>;
  43. status = "disabled";
  44. };
  45. dmac: dma@fc400000 {
  46. compatible = "arm,pl080", "arm,primecell";
  47. reg = <0xfc400000 0x1000>;
  48. interrupt-parent = <&vic1>;
  49. interrupts = <10>;
  50. status = "disabled";
  51. };
  52. gmac: ethernet@e0800000 {
  53. compatible = "st,spear600-gmac";
  54. reg = <0xe0800000 0x8000>;
  55. interrupt-parent = <&vic1>;
  56. interrupts = <24 23>;
  57. interrupt-names = "macirq", "eth_wake_irq";
  58. phy-mode = "gmii";
  59. status = "disabled";
  60. };
  61. fsmc: flash@d1800000 {
  62. compatible = "st,spear600-fsmc-nand";
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65. reg = <0xd1800000 0x1000 /* FSMC Register */
  66. 0xd2000000 0x0010 /* NAND Base DATA */
  67. 0xd2020000 0x0010 /* NAND Base ADDR */
  68. 0xd2010000 0x0010>; /* NAND Base CMD */
  69. reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  70. status = "disabled";
  71. };
  72. smi: flash@fc000000 {
  73. compatible = "st,spear600-smi";
  74. #address-cells = <1>;
  75. #size-cells = <1>;
  76. reg = <0xfc000000 0x1000>;
  77. interrupt-parent = <&vic1>;
  78. interrupts = <12>;
  79. status = "disabled";
  80. };
  81. ehci_usb0: ehci@e1800000 {
  82. compatible = "st,spear600-ehci", "usb-ehci";
  83. reg = <0xe1800000 0x1000>;
  84. interrupt-parent = <&vic1>;
  85. interrupts = <27>;
  86. status = "disabled";
  87. };
  88. ehci_usb1: ehci@e2000000 {
  89. compatible = "st,spear600-ehci", "usb-ehci";
  90. reg = <0xe2000000 0x1000>;
  91. interrupt-parent = <&vic1>;
  92. interrupts = <29>;
  93. status = "disabled";
  94. };
  95. ohci_usb0: ohci@e1900000 {
  96. compatible = "st,spear600-ohci", "usb-ohci";
  97. reg = <0xe1900000 0x1000>;
  98. interrupt-parent = <&vic1>;
  99. interrupts = <26>;
  100. status = "disabled";
  101. };
  102. ohci_usb1: ohci@e2100000 {
  103. compatible = "st,spear600-ohci", "usb-ohci";
  104. reg = <0xe2100000 0x1000>;
  105. interrupt-parent = <&vic1>;
  106. interrupts = <28>;
  107. status = "disabled";
  108. };
  109. apb {
  110. #address-cells = <1>;
  111. #size-cells = <1>;
  112. compatible = "simple-bus";
  113. ranges = <0xd0000000 0xd0000000 0x30000000>;
  114. uart0: serial@d0000000 {
  115. compatible = "arm,pl011", "arm,primecell";
  116. reg = <0xd0000000 0x1000>;
  117. interrupt-parent = <&vic0>;
  118. interrupts = <24>;
  119. status = "disabled";
  120. };
  121. uart1: serial@d0080000 {
  122. compatible = "arm,pl011", "arm,primecell";
  123. reg = <0xd0080000 0x1000>;
  124. interrupt-parent = <&vic0>;
  125. interrupts = <25>;
  126. status = "disabled";
  127. };
  128. /* local/cpu GPIO */
  129. gpio0: gpio@f0100000 {
  130. #gpio-cells = <2>;
  131. compatible = "arm,pl061", "arm,primecell";
  132. gpio-controller;
  133. reg = <0xf0100000 0x1000>;
  134. interrupt-parent = <&vic0>;
  135. interrupts = <18>;
  136. };
  137. /* basic GPIO */
  138. gpio1: gpio@fc980000 {
  139. #gpio-cells = <2>;
  140. compatible = "arm,pl061", "arm,primecell";
  141. gpio-controller;
  142. reg = <0xfc980000 0x1000>;
  143. interrupt-parent = <&vic1>;
  144. interrupts = <19>;
  145. };
  146. /* appl GPIO */
  147. gpio2: gpio@d8100000 {
  148. #gpio-cells = <2>;
  149. compatible = "arm,pl061", "arm,primecell";
  150. gpio-controller;
  151. reg = <0xd8100000 0x1000>;
  152. interrupt-parent = <&vic1>;
  153. interrupts = <4>;
  154. };
  155. i2c: i2c@d0200000 {
  156. #address-cells = <1>;
  157. #size-cells = <0>;
  158. compatible = "snps,designware-i2c";
  159. reg = <0xd0200000 0x1000>;
  160. interrupt-parent = <&vic0>;
  161. interrupts = <28>;
  162. status = "disabled";
  163. };
  164. rtc: rtc@fc900000 {
  165. compatible = "st,spear600-rtc";
  166. reg = <0xfc900000 0x1000>;
  167. interrupt-parent = <&vic0>;
  168. interrupts = <10>;
  169. status = "disabled";
  170. };
  171. timer@f0000000 {
  172. compatible = "st,spear-timer";
  173. reg = <0xf0000000 0x400>;
  174. interrupt-parent = <&vic0>;
  175. interrupts = <16>;
  176. };
  177. adc: adc@d820b000 {
  178. compatible = "st,spear600-adc";
  179. reg = <0xd820b000 0x1000>;
  180. interrupt-parent = <&vic1>;
  181. interrupts = <6>;
  182. status = "disabled";
  183. };
  184. };
  185. };
  186. };