spear310.dtsi 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * DTS file for SPEAr310 SoC
  4. *
  5. * Copyright 2012 Viresh Kumar <[email protected]>
  6. */
  7. /include/ "spear3xx.dtsi"
  8. / {
  9. ahb {
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. compatible = "simple-bus";
  13. ranges = <0x40000000 0x40000000 0x10000000
  14. 0xb0000000 0xb0000000 0x10000000
  15. 0xd0000000 0xd0000000 0x30000000>;
  16. pinmux: pinmux@b4000000 {
  17. compatible = "st,spear310-pinmux";
  18. reg = <0xb4000000 0x1000>;
  19. #gpio-range-cells = <3>;
  20. };
  21. fsmc: flash@44000000 {
  22. compatible = "st,spear600-fsmc-nand";
  23. #address-cells = <1>;
  24. #size-cells = <1>;
  25. reg = <0x44000000 0x1000 /* FSMC Register */
  26. 0x40000000 0x0010 /* NAND Base DATA */
  27. 0x40020000 0x0010 /* NAND Base ADDR */
  28. 0x40010000 0x0010>; /* NAND Base CMD */
  29. reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  30. status = "disabled";
  31. };
  32. shirq: interrupt-controller@0xb4000000 {
  33. compatible = "st,spear310-shirq";
  34. reg = <0xb4000000 0x1000>;
  35. interrupts = <28 29 30 1>;
  36. #interrupt-cells = <1>;
  37. interrupt-controller;
  38. };
  39. apb {
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. compatible = "simple-bus";
  43. ranges = <0xb0000000 0xb0000000 0x10000000
  44. 0xd0000000 0xd0000000 0x30000000>;
  45. serial@b2000000 {
  46. compatible = "arm,pl011", "arm,primecell";
  47. reg = <0xb2000000 0x1000>;
  48. interrupts = <8>;
  49. interrupt-parent = <&shirq>;
  50. status = "disabled";
  51. };
  52. serial@b2080000 {
  53. compatible = "arm,pl011", "arm,primecell";
  54. reg = <0xb2080000 0x1000>;
  55. interrupts = <9>;
  56. interrupt-parent = <&shirq>;
  57. status = "disabled";
  58. };
  59. serial@b2100000 {
  60. compatible = "arm,pl011", "arm,primecell";
  61. reg = <0xb2100000 0x1000>;
  62. interrupts = <10>;
  63. interrupt-parent = <&shirq>;
  64. status = "disabled";
  65. };
  66. serial@b2180000 {
  67. compatible = "arm,pl011", "arm,primecell";
  68. reg = <0xb2180000 0x1000>;
  69. interrupts = <11>;
  70. interrupt-parent = <&shirq>;
  71. status = "disabled";
  72. };
  73. serial@b2200000 {
  74. compatible = "arm,pl011", "arm,primecell";
  75. reg = <0xb2200000 0x1000>;
  76. interrupts = <12>;
  77. interrupt-parent = <&shirq>;
  78. status = "disabled";
  79. };
  80. gpiopinctrl: gpio@b4000000 {
  81. compatible = "st,spear-plgpio";
  82. reg = <0xb4000000 0x1000>;
  83. regmap = <&pinmux>;
  84. #interrupt-cells = <1>;
  85. interrupt-controller;
  86. gpio-controller;
  87. #gpio-cells = <2>;
  88. gpio-ranges = <&pinmux 0 0 102>;
  89. status = "disabled";
  90. st-plgpio,ngpio = <102>;
  91. st-plgpio,enb-reg = <0x10>;
  92. st-plgpio,wdata-reg = <0x20>;
  93. st-plgpio,dir-reg = <0x30>;
  94. st-plgpio,ie-reg = <0x50>;
  95. st-plgpio,rdata-reg = <0x40>;
  96. st-plgpio,mis-reg = <0x60>;
  97. };
  98. };
  99. };
  100. };