s3c64xx.dtsi 4.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Samsung's S3C64xx SoC series common device tree source
  4. *
  5. * Copyright (c) 2013 Tomasz Figa <[email protected]>
  6. *
  7. * Samsung's S3C64xx SoC series device nodes are listed in this file.
  8. * Particular SoCs from S3C64xx series can include this file and provide
  9. * values for SoCs specfic bindings.
  10. *
  11. * Note: This file does not include device nodes for all the controllers in
  12. * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional
  13. * nodes can be added to this file.
  14. */
  15. #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
  16. / {
  17. #address-cells = <1>;
  18. #size-cells = <1>;
  19. aliases {
  20. i2c0 = &i2c0;
  21. pinctrl0 = &pinctrl0;
  22. serial0 = &uart0;
  23. serial1 = &uart1;
  24. serial2 = &uart2;
  25. serial3 = &uart3;
  26. };
  27. cpus {
  28. #address-cells = <1>;
  29. #size-cells = <0>;
  30. cpu@0 {
  31. device_type = "cpu";
  32. compatible = "arm,arm1176jzf-s";
  33. reg = <0x0>;
  34. };
  35. };
  36. soc: soc {
  37. compatible = "simple-bus";
  38. #address-cells = <1>;
  39. #size-cells = <1>;
  40. ranges;
  41. vic0: interrupt-controller@71200000 {
  42. compatible = "arm,pl192-vic";
  43. interrupt-controller;
  44. reg = <0x71200000 0x1000>;
  45. #interrupt-cells = <1>;
  46. };
  47. vic1: interrupt-controller@71300000 {
  48. compatible = "arm,pl192-vic";
  49. interrupt-controller;
  50. reg = <0x71300000 0x1000>;
  51. #interrupt-cells = <1>;
  52. };
  53. sdhci0: mmc@7c200000 {
  54. compatible = "samsung,s3c6410-sdhci";
  55. reg = <0x7c200000 0x100>;
  56. interrupt-parent = <&vic1>;
  57. interrupts = <24>;
  58. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  59. clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
  60. <&clocks SCLK_MMC0>;
  61. status = "disabled";
  62. };
  63. sdhci1: mmc@7c300000 {
  64. compatible = "samsung,s3c6410-sdhci";
  65. reg = <0x7c300000 0x100>;
  66. interrupt-parent = <&vic1>;
  67. interrupts = <25>;
  68. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  69. clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
  70. <&clocks SCLK_MMC1>;
  71. status = "disabled";
  72. };
  73. sdhci2: mmc@7c400000 {
  74. compatible = "samsung,s3c6410-sdhci";
  75. reg = <0x7c400000 0x100>;
  76. interrupt-parent = <&vic1>;
  77. interrupts = <17>;
  78. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  79. clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>,
  80. <&clocks SCLK_MMC2>;
  81. status = "disabled";
  82. };
  83. watchdog: watchdog@7e004000 {
  84. compatible = "samsung,s3c6410-wdt";
  85. reg = <0x7e004000 0x1000>;
  86. interrupt-parent = <&vic0>;
  87. interrupts = <26>;
  88. clock-names = "watchdog";
  89. clocks = <&clocks PCLK_WDT>;
  90. };
  91. i2c0: i2c@7f004000 {
  92. compatible = "samsung,s3c2440-i2c";
  93. reg = <0x7f004000 0x1000>;
  94. interrupt-parent = <&vic1>;
  95. interrupts = <18>;
  96. clock-names = "i2c";
  97. clocks = <&clocks PCLK_IIC0>;
  98. status = "disabled";
  99. #address-cells = <1>;
  100. #size-cells = <0>;
  101. };
  102. uart0: serial@7f005000 {
  103. compatible = "samsung,s3c6400-uart";
  104. reg = <0x7f005000 0x100>;
  105. interrupt-parent = <&vic1>;
  106. interrupts = <5>;
  107. clock-names = "uart", "clk_uart_baud2",
  108. "clk_uart_baud3";
  109. clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
  110. <&clocks SCLK_UART>;
  111. status = "disabled";
  112. };
  113. uart1: serial@7f005400 {
  114. compatible = "samsung,s3c6400-uart";
  115. reg = <0x7f005400 0x100>;
  116. interrupt-parent = <&vic1>;
  117. interrupts = <6>;
  118. clock-names = "uart", "clk_uart_baud2",
  119. "clk_uart_baud3";
  120. clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
  121. <&clocks SCLK_UART>;
  122. status = "disabled";
  123. };
  124. uart2: serial@7f005800 {
  125. compatible = "samsung,s3c6400-uart";
  126. reg = <0x7f005800 0x100>;
  127. interrupt-parent = <&vic1>;
  128. interrupts = <7>;
  129. clock-names = "uart", "clk_uart_baud2",
  130. "clk_uart_baud3";
  131. clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
  132. <&clocks SCLK_UART>;
  133. status = "disabled";
  134. };
  135. uart3: serial@7f005c00 {
  136. compatible = "samsung,s3c6400-uart";
  137. reg = <0x7f005c00 0x100>;
  138. interrupt-parent = <&vic1>;
  139. interrupts = <8>;
  140. clock-names = "uart", "clk_uart_baud2",
  141. "clk_uart_baud3";
  142. clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
  143. <&clocks SCLK_UART>;
  144. status = "disabled";
  145. };
  146. pwm: pwm@7f006000 {
  147. compatible = "samsung,s3c6400-pwm";
  148. reg = <0x7f006000 0x1000>;
  149. interrupt-parent = <&vic0>;
  150. interrupts = <23>, <24>, <25>, <27>, <28>;
  151. clock-names = "timers";
  152. clocks = <&clocks PCLK_PWM>;
  153. samsung,pwm-outputs = <0>, <1>;
  154. #pwm-cells = <3>;
  155. };
  156. pinctrl0: pinctrl@7f008000 {
  157. compatible = "samsung,s3c64xx-pinctrl";
  158. reg = <0x7f008000 0x1000>;
  159. interrupt-parent = <&vic1>;
  160. interrupts = <21>;
  161. wakeup-interrupt-controller {
  162. compatible = "samsung,s3c64xx-wakeup-eint";
  163. interrupts-extended = <&vic0 0>,
  164. <&vic0 1>,
  165. <&vic1 0>,
  166. <&vic1 1>;
  167. };
  168. };
  169. };
  170. };
  171. #include "s3c64xx-pinctrl.dtsi"