s3c2416.dtsi 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Samsung's S3C2416 SoC device tree source
  4. *
  5. * Copyright (c) 2013 Heiko Stuebner <[email protected]>
  6. */
  7. #include <dt-bindings/clock/s3c2443.h>
  8. #include "s3c24xx.dtsi"
  9. #include "s3c2416-pinctrl.dtsi"
  10. / {
  11. model = "Samsung S3C2416 SoC";
  12. compatible = "samsung,s3c2416";
  13. aliases {
  14. serial3 = &uart_3;
  15. };
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. cpu@0 {
  20. device_type = "cpu";
  21. compatible = "arm,arm926ej-s";
  22. reg = <0x0>;
  23. };
  24. };
  25. clocks: clock-controller@4c000000 {
  26. compatible = "samsung,s3c2416-clock";
  27. reg = <0x4c000000 0x40>;
  28. #clock-cells = <1>;
  29. };
  30. uart_3: serial@5000c000 {
  31. compatible = "samsung,s3c2440-uart";
  32. reg = <0x5000C000 0x4000>;
  33. interrupts = <1 18 24 4>, <1 18 25 4>;
  34. clock-names = "uart", "clk_uart_baud2",
  35. "clk_uart_baud3";
  36. clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
  37. <&clocks SCLK_UART>;
  38. status = "disabled";
  39. };
  40. sdhci_1: mmc@4ac00000 {
  41. compatible = "samsung,s3c6410-sdhci";
  42. reg = <0x4AC00000 0x100>;
  43. interrupts = <0 0 21 3>;
  44. clock-names = "hsmmc", "mmc_busclk.0",
  45. "mmc_busclk.2";
  46. clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
  47. <&clocks MUX_HSMMC0>;
  48. status = "disabled";
  49. };
  50. sdhci_0: mmc@4a800000 {
  51. compatible = "samsung,s3c6410-sdhci";
  52. reg = <0x4A800000 0x100>;
  53. interrupts = <0 0 20 3>;
  54. clock-names = "hsmmc", "mmc_busclk.0",
  55. "mmc_busclk.2";
  56. clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
  57. <&clocks MUX_HSMMC1>;
  58. status = "disabled";
  59. };
  60. };
  61. &i2c {
  62. compatible = "samsung,s3c2440-i2c";
  63. clocks = <&clocks PCLK_I2C0>;
  64. clock-names = "i2c";
  65. };
  66. &intc {
  67. compatible = "samsung,s3c2416-irq";
  68. };
  69. &pinctrl_0 {
  70. compatible = "samsung,s3c2416-pinctrl";
  71. };
  72. &rtc {
  73. compatible = "samsung,s3c2416-rtc";
  74. clocks = <&clocks PCLK_RTC>;
  75. clock-names = "rtc";
  76. };
  77. &timer {
  78. clocks = <&clocks PCLK_PWM>;
  79. clock-names = "timers";
  80. };
  81. &uart_0 {
  82. compatible = "samsung,s3c2440-uart";
  83. clock-names = "uart", "clk_uart_baud2",
  84. "clk_uart_baud3";
  85. clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
  86. <&clocks SCLK_UART>;
  87. };
  88. &uart_1 {
  89. compatible = "samsung,s3c2440-uart";
  90. clock-names = "uart", "clk_uart_baud2",
  91. "clk_uart_baud3";
  92. clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
  93. <&clocks SCLK_UART>;
  94. };
  95. &uart_2 {
  96. compatible = "samsung,s3c2440-uart";
  97. clock-names = "uart", "clk_uart_baud2",
  98. "clk_uart_baud3";
  99. clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
  100. <&clocks SCLK_UART>;
  101. };
  102. &watchdog {
  103. interrupts = <1 9 27 3>;
  104. clocks = <&clocks PCLK_WDT>;
  105. clock-names = "watchdog";
  106. };