rk3288-veyron-mickey.dts 9.2 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Google Veyron Mickey Rev 0 board device tree source
  4. *
  5. * Copyright 2015 Google, Inc
  6. */
  7. /dts-v1/;
  8. #include "rk3288-veyron.dtsi"
  9. #include "rk3288-veyron-broadcom-bluetooth.dtsi"
  10. / {
  11. model = "Google Mickey";
  12. compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
  13. "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
  14. "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
  15. "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
  16. "google,veyron-mickey-rev0", "google,veyron-mickey",
  17. "google,veyron", "rockchip,rk3288";
  18. vcc_5v: vcc-5v {
  19. vin-supply = <&vcc33_sys>;
  20. };
  21. vcc33_io: vcc33_io {
  22. compatible = "regulator-fixed";
  23. regulator-name = "vcc33_io";
  24. regulator-always-on;
  25. regulator-boot-on;
  26. vin-supply = <&vcc33_sys>;
  27. };
  28. sound {
  29. compatible = "rockchip,rockchip-audio-max98090";
  30. rockchip,model = "VEYRON-HDMI";
  31. rockchip,hdmi-codec = <&hdmi>;
  32. rockchip,i2s-controller = <&i2s>;
  33. };
  34. };
  35. &cpu_thermal {
  36. /delete-node/ trips;
  37. /delete-node/ cooling-maps;
  38. trips {
  39. cpu_alert_almost_warm: cpu_alert_almost_warm {
  40. temperature = <63000>; /* millicelsius */
  41. hysteresis = <2000>; /* millicelsius */
  42. type = "passive";
  43. };
  44. cpu_alert_warm: cpu_alert_warm {
  45. temperature = <65000>; /* millicelsius */
  46. hysteresis = <2000>; /* millicelsius */
  47. type = "passive";
  48. };
  49. cpu_alert_almost_hot: cpu_alert_almost_hot {
  50. temperature = <80000>; /* millicelsius */
  51. hysteresis = <2000>; /* millicelsius */
  52. type = "passive";
  53. };
  54. cpu_alert_hot: cpu_alert_hot {
  55. temperature = <82000>; /* millicelsius */
  56. hysteresis = <2000>; /* millicelsius */
  57. type = "passive";
  58. };
  59. cpu_alert_hotter: cpu_alert_hotter {
  60. temperature = <84000>; /* millicelsius */
  61. hysteresis = <2000>; /* millicelsius */
  62. type = "passive";
  63. };
  64. cpu_alert_very_hot: cpu_alert_very_hot {
  65. temperature = <85000>; /* millicelsius */
  66. hysteresis = <2000>; /* millicelsius */
  67. type = "passive";
  68. };
  69. cpu_crit: cpu_crit {
  70. temperature = <90000>; /* millicelsius */
  71. hysteresis = <2000>; /* millicelsius */
  72. type = "critical";
  73. };
  74. };
  75. cooling-maps {
  76. /*
  77. * After 1st level, throttle the CPU down to as low as 1.4 GHz
  78. * and don't let the GPU go faster than 400 MHz.
  79. */
  80. cpu_warm_limit_cpu {
  81. trip = <&cpu_alert_warm>;
  82. cooling-device = <&cpu0 THERMAL_NO_LIMIT 4>,
  83. <&cpu1 THERMAL_NO_LIMIT 4>,
  84. <&cpu2 THERMAL_NO_LIMIT 4>,
  85. <&cpu3 THERMAL_NO_LIMIT 4>;
  86. };
  87. cpu_warm_limit_gpu {
  88. trip = <&cpu_alert_warm>;
  89. cooling-device = <&gpu 1 1>;
  90. };
  91. /*
  92. * Add some discrete steps to help throttling system deal
  93. * with the fact that there are two passive cooling devices:
  94. * the CPU and the GPU.
  95. *
  96. * - 1.2 GHz - 1.0 GHz (almost hot)
  97. * - 800 MHz (hot)
  98. * - 800 MHz - 696 MHz (hotter)
  99. * - 696 MHz - min (very hot)
  100. *
  101. * Note:
  102. * - 800 MHz appears to be a "sweet spot" for me. I can run
  103. * some pretty serious workload here and be happy.
  104. * - After 696 MHz we stop lowering voltage, so throttling
  105. * past there is less effective.
  106. */
  107. cpu_almost_hot_limit_cpu {
  108. trip = <&cpu_alert_almost_hot>;
  109. cooling-device = <&cpu0 5 6>, <&cpu1 5 6>, <&cpu2 5 6>,
  110. <&cpu3 5 6>;
  111. };
  112. cpu_hot_limit_cpu {
  113. trip = <&cpu_alert_hot>;
  114. cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, <&cpu2 7 7>,
  115. <&cpu3 7 7>;
  116. };
  117. cpu_hotter_limit_cpu {
  118. trip = <&cpu_alert_hotter>;
  119. cooling-device = <&cpu0 7 8>, <&cpu1 7 8>, <&cpu2 7 8>,
  120. <&cpu3 7 8>;
  121. };
  122. cpu_very_hot_limit_cpu {
  123. trip = <&cpu_alert_very_hot>;
  124. cooling-device = <&cpu0 8 THERMAL_NO_LIMIT>,
  125. <&cpu1 8 THERMAL_NO_LIMIT>,
  126. <&cpu2 8 THERMAL_NO_LIMIT>,
  127. <&cpu3 8 THERMAL_NO_LIMIT>;
  128. };
  129. /* At very hot, don't let GPU go over 300 MHz */
  130. cpu_very_hot_limit_gpu {
  131. trip = <&cpu_alert_very_hot>;
  132. cooling-device = <&gpu 2 2>;
  133. };
  134. };
  135. };
  136. &gpu_thermal {
  137. /delete-node/ trips;
  138. /delete-node/ cooling-maps;
  139. trips {
  140. gpu_alert_warmish: gpu_alert_warmish {
  141. temperature = <60000>; /* millicelsius */
  142. hysteresis = <2000>; /* millicelsius */
  143. type = "passive";
  144. };
  145. gpu_alert_warm: gpu_alert_warm {
  146. temperature = <65000>; /* millicelsius */
  147. hysteresis = <2000>; /* millicelsius */
  148. type = "passive";
  149. };
  150. gpu_alert_hotter: gpu_alert_hotter {
  151. temperature = <84000>; /* millicelsius */
  152. hysteresis = <2000>; /* millicelsius */
  153. type = "passive";
  154. };
  155. gpu_alert_very_very_hot: gpu_alert_very_very_hot {
  156. temperature = <86000>; /* millicelsius */
  157. hysteresis = <2000>; /* millicelsius */
  158. type = "passive";
  159. };
  160. gpu_crit: gpu_crit {
  161. temperature = <90000>; /* millicelsius */
  162. hysteresis = <2000>; /* millicelsius */
  163. type = "critical";
  164. };
  165. };
  166. cooling-maps {
  167. /* After 1st level throttle the GPU down to as low as 400 MHz */
  168. gpu_warmish_limit_gpu {
  169. trip = <&gpu_alert_warmish>;
  170. cooling-device = <&gpu THERMAL_NO_LIMIT 1>;
  171. };
  172. /*
  173. * Slightly after we throttle the GPU, we'll also make sure that
  174. * the CPU can't go faster than 1.4 GHz. Note that we won't
  175. * throttle the CPU lower than 1.4 GHz due to GPU heat--we'll
  176. * let the CPU do the rest itself.
  177. */
  178. gpu_warm_limit_cpu {
  179. trip = <&gpu_alert_warm>;
  180. cooling-device = <&cpu0 4 4>,
  181. <&cpu1 4 4>,
  182. <&cpu2 4 4>,
  183. <&cpu3 4 4>;
  184. };
  185. /* When hot, GPU goes down to 300 MHz */
  186. gpu_hotter_limit_gpu {
  187. trip = <&gpu_alert_hotter>;
  188. cooling-device = <&gpu 2 2>;
  189. };
  190. /* When really hot, don't let GPU go _above_ 300 MHz */
  191. gpu_very_very_hot_limit_gpu {
  192. trip = <&gpu_alert_very_very_hot>;
  193. cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
  194. };
  195. };
  196. };
  197. &i2c2 {
  198. status = "disabled";
  199. };
  200. &i2c4 {
  201. status = "disabled";
  202. };
  203. &i2s {
  204. status = "okay";
  205. };
  206. &rk808 {
  207. pinctrl-names = "default";
  208. pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
  209. dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
  210. <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
  211. /delete-property/ vcc6-supply;
  212. /delete-property/ vcc12-supply;
  213. vcc11-supply = <&vcc33_sys>;
  214. regulators {
  215. /* vcc33_io is sourced directly from vcc33_sys */
  216. /delete-node/ LDO_REG1;
  217. /delete-node/ LDO_REG7;
  218. /* This is not a pwren anymore, but the real power supply */
  219. vdd10_lcd: LDO_REG7 {
  220. regulator-always-on;
  221. regulator-boot-on;
  222. regulator-min-microvolt = <1000000>;
  223. regulator-max-microvolt = <1000000>;
  224. regulator-name = "vdd10_lcd";
  225. regulator-suspend-mem-disabled;
  226. };
  227. vcc18_lcd: LDO_REG8 {
  228. regulator-always-on;
  229. regulator-boot-on;
  230. regulator-min-microvolt = <1800000>;
  231. regulator-max-microvolt = <1800000>;
  232. regulator-name = "vcc18_lcd";
  233. regulator-suspend-mem-disabled;
  234. };
  235. };
  236. };
  237. &gpio0 {
  238. gpio-line-names = "PMIC_SLEEP_AP",
  239. "",
  240. "",
  241. "",
  242. "PMIC_INT_L",
  243. "POWER_BUTTON_L",
  244. "",
  245. "",
  246. "",
  247. /*
  248. * RECOVERY_SW_L is Chrome OS ABI. Schematics call
  249. * it REC_MODE_L.
  250. */
  251. "RECOVERY_SW_L",
  252. "OT_RESET",
  253. "",
  254. "",
  255. "AP_WARM_RESET_H",
  256. "",
  257. "I2C0_SDA_PMIC",
  258. "I2C0_SCL_PMIC",
  259. "",
  260. "nFALUT";
  261. };
  262. &gpio2 {
  263. gpio-line-names = "CONFIG0",
  264. "CONFIG1",
  265. "CONFIG2",
  266. "",
  267. "",
  268. "",
  269. "",
  270. "CONFIG3",
  271. "",
  272. "EMMC_RST_L";
  273. };
  274. &gpio3 {
  275. gpio-line-names = "FLASH0_D0",
  276. "FLASH0_D1",
  277. "FLASH0_D2",
  278. "FLASH0_D3",
  279. "FLASH0_D4",
  280. "FLASH0_D5",
  281. "FLASH0_D6",
  282. "FLASH0_D7",
  283. "",
  284. "",
  285. "",
  286. "",
  287. "",
  288. "",
  289. "",
  290. "",
  291. "FLASH0_CS2/EMMC_CMD",
  292. "",
  293. "FLASH0_DQS/EMMC_CLKO";
  294. };
  295. &gpio4 {
  296. gpio-line-names = "",
  297. "",
  298. "",
  299. "",
  300. "",
  301. "",
  302. "",
  303. "",
  304. "",
  305. "",
  306. "",
  307. "",
  308. "",
  309. "",
  310. "",
  311. "",
  312. "UART0_RXD",
  313. "UART0_TXD",
  314. "UART0_CTS_L",
  315. "UART0_RTS_L",
  316. "SDIO0_D0",
  317. "SDIO0_D1",
  318. "SDIO0_D2",
  319. "SDIO0_D3",
  320. "SDIO0_CMD",
  321. "SDIO0_CLK",
  322. "BT_DEV_WAKE",
  323. "",
  324. "WIFI_ENABLE_H",
  325. "BT_ENABLE_L",
  326. "WIFI_HOST_WAKE",
  327. "BT_HOST_WAKE";
  328. };
  329. &gpio7 {
  330. gpio-line-names = "",
  331. "PWM_LOG",
  332. "",
  333. "",
  334. "TPM_INT_H",
  335. "SDMMC_DET_L",
  336. /*
  337. * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
  338. * it FW_WP_AP.
  339. */
  340. "AP_FLASH_WP_L",
  341. "",
  342. "CPU_NMI",
  343. "DVSOK",
  344. "HDMI_WAKE",
  345. "POWER_HDMI_ON",
  346. "DVS1",
  347. "",
  348. "",
  349. "DVS2",
  350. "HDMI_CEC",
  351. "",
  352. "",
  353. "I2C5_SDA_HDMI",
  354. "I2C5_SCL_HDMI",
  355. "",
  356. "UART2_RXD",
  357. "UART2_TXD";
  358. };
  359. &gpio8 {
  360. gpio-line-names = "RAM_ID0",
  361. "RAM_ID1",
  362. "RAM_ID2",
  363. "RAM_ID3",
  364. "I2C1_SDA_TPM",
  365. "I2C1_SCL_TPM",
  366. "SPI2_CLK",
  367. "SPI2_CS0",
  368. "SPI2_RXD",
  369. "SPI2_TXD";
  370. };
  371. &pinctrl {
  372. pinctrl-names = "default";
  373. pinctrl-0 = <
  374. /* Common for sleep and wake, but no owners */
  375. &ddr0_retention
  376. &ddrio_pwroff
  377. &global_pwroff
  378. >;
  379. hdmi {
  380. power_hdmi_on: power-hdmi-on {
  381. rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
  382. };
  383. };
  384. pmic {
  385. dvs_1: dvs-1 {
  386. rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
  387. };
  388. dvs_2: dvs-2 {
  389. rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
  390. };
  391. };
  392. };
  393. &usb_host0_ehci {
  394. status = "disabled";
  395. };
  396. &usb_host1 {
  397. status = "disabled";
  398. };
  399. &vcc50_hdmi {
  400. enable-active-high;
  401. gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>;
  402. pinctrl-names = "default";
  403. pinctrl-0 = <&power_hdmi_on>;
  404. };