rk3228-evb.dts 1.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /dts-v1/;
  3. #include "rk322x.dtsi"
  4. / {
  5. model = "Rockchip RK3228 Evaluation board";
  6. compatible = "rockchip,rk3228-evb", "rockchip,rk3228";
  7. aliases {
  8. mmc0 = &emmc;
  9. };
  10. memory@60000000 {
  11. device_type = "memory";
  12. reg = <0x60000000 0x40000000>;
  13. };
  14. vcc_phy: vcc-phy-regulator {
  15. compatible = "regulator-fixed";
  16. enable-active-high;
  17. regulator-name = "vcc_phy";
  18. regulator-min-microvolt = <1800000>;
  19. regulator-max-microvolt = <1800000>;
  20. regulator-always-on;
  21. regulator-boot-on;
  22. };
  23. };
  24. &emmc {
  25. cap-mmc-highspeed;
  26. mmc-ddr-1_8v;
  27. disable-wp;
  28. non-removable;
  29. status = "okay";
  30. };
  31. &gmac {
  32. assigned-clocks = <&cru SCLK_MAC_SRC>;
  33. assigned-clock-rates = <50000000>;
  34. clock_in_out = "output";
  35. phy-supply = <&vcc_phy>;
  36. phy-mode = "rmii";
  37. phy-handle = <&phy>;
  38. status = "okay";
  39. mdio {
  40. compatible = "snps,dwmac-mdio";
  41. #address-cells = <1>;
  42. #size-cells = <0>;
  43. phy: ethernet-phy@0 {
  44. compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
  45. reg = <0>;
  46. clocks = <&cru SCLK_MAC_PHY>;
  47. resets = <&cru SRST_MACPHY>;
  48. phy-is-integrated;
  49. };
  50. };
  51. };
  52. &tsadc {
  53. status = "okay";
  54. rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
  55. rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
  56. };
  57. &uart2 {
  58. status = "okay";
  59. };