r8a7794-alt.dts 9.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the Alt board
  4. *
  5. * Copyright (C) 2014 Renesas Electronics Corporation
  6. */
  7. /dts-v1/;
  8. #include "r8a7794.dtsi"
  9. #include <dt-bindings/gpio/gpio.h>
  10. #include <dt-bindings/input/input.h>
  11. / {
  12. model = "Alt";
  13. compatible = "renesas,alt", "renesas,r8a7794";
  14. aliases {
  15. serial0 = &scif2;
  16. i2c9 = &gpioi2c1;
  17. i2c10 = &gpioi2c4;
  18. i2c11 = &i2chdmi;
  19. i2c12 = &i2cexio4;
  20. mmc0 = &mmcif0;
  21. mmc1 = &sdhi0;
  22. mmc2 = &sdhi1;
  23. };
  24. chosen {
  25. bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  26. stdout-path = "serial0:115200n8";
  27. };
  28. memory@40000000 {
  29. device_type = "memory";
  30. reg = <0 0x40000000 0 0x40000000>;
  31. };
  32. d3_3v: regulator-d3-3v {
  33. compatible = "regulator-fixed";
  34. regulator-name = "D3.3V";
  35. regulator-min-microvolt = <3300000>;
  36. regulator-max-microvolt = <3300000>;
  37. regulator-boot-on;
  38. regulator-always-on;
  39. };
  40. vcc_sdhi0: regulator-vcc-sdhi0 {
  41. compatible = "regulator-fixed";
  42. regulator-name = "SDHI0 Vcc";
  43. regulator-min-microvolt = <3300000>;
  44. regulator-max-microvolt = <3300000>;
  45. gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
  46. enable-active-high;
  47. };
  48. vccq_sdhi0: regulator-vccq-sdhi0 {
  49. compatible = "regulator-gpio";
  50. regulator-name = "SDHI0 VccQ";
  51. regulator-min-microvolt = <1800000>;
  52. regulator-max-microvolt = <3300000>;
  53. gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
  54. gpios-states = <1>;
  55. states = <3300000 1>, <1800000 0>;
  56. };
  57. vcc_sdhi1: regulator-vcc-sdhi1 {
  58. compatible = "regulator-fixed";
  59. regulator-name = "SDHI1 Vcc";
  60. regulator-min-microvolt = <3300000>;
  61. regulator-max-microvolt = <3300000>;
  62. gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
  63. enable-active-high;
  64. };
  65. vccq_sdhi1: regulator-vccq-sdhi1 {
  66. compatible = "regulator-gpio";
  67. regulator-name = "SDHI1 VccQ";
  68. regulator-min-microvolt = <1800000>;
  69. regulator-max-microvolt = <3300000>;
  70. gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  71. gpios-states = <1>;
  72. states = <3300000 1>, <1800000 0>;
  73. };
  74. lbsc {
  75. #address-cells = <1>;
  76. #size-cells = <1>;
  77. };
  78. keyboard {
  79. compatible = "gpio-keys";
  80. pinctrl-0 = <&keyboard_pins>;
  81. pinctrl-names = "default";
  82. one {
  83. linux,code = <KEY_1>;
  84. label = "SW2-1";
  85. wakeup-source;
  86. debounce-interval = <20>;
  87. gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
  88. };
  89. two {
  90. linux,code = <KEY_2>;
  91. label = "SW2-2";
  92. wakeup-source;
  93. debounce-interval = <20>;
  94. gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
  95. };
  96. three {
  97. linux,code = <KEY_3>;
  98. label = "SW2-3";
  99. wakeup-source;
  100. debounce-interval = <20>;
  101. gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
  102. };
  103. four {
  104. linux,code = <KEY_4>;
  105. label = "SW2-4";
  106. wakeup-source;
  107. debounce-interval = <20>;
  108. gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
  109. };
  110. };
  111. vga-encoder {
  112. compatible = "adi,adv7123";
  113. ports {
  114. #address-cells = <1>;
  115. #size-cells = <0>;
  116. port@0 {
  117. reg = <0>;
  118. adv7123_in: endpoint {
  119. remote-endpoint = <&du_out_rgb1>;
  120. };
  121. };
  122. port@1 {
  123. reg = <1>;
  124. adv7123_out: endpoint {
  125. remote-endpoint = <&vga_in>;
  126. };
  127. };
  128. };
  129. };
  130. vga {
  131. compatible = "vga-connector";
  132. port {
  133. vga_in: endpoint {
  134. remote-endpoint = <&adv7123_out>;
  135. };
  136. };
  137. };
  138. x2_clk: x2-clock {
  139. compatible = "fixed-clock";
  140. #clock-cells = <0>;
  141. clock-frequency = <74250000>;
  142. };
  143. x13_clk: x13-clock {
  144. compatible = "fixed-clock";
  145. #clock-cells = <0>;
  146. clock-frequency = <148500000>;
  147. };
  148. gpioi2c1: i2c-9 {
  149. #address-cells = <1>;
  150. #size-cells = <0>;
  151. compatible = "i2c-gpio";
  152. status = "disabled";
  153. scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  154. sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  155. };
  156. gpioi2c4: i2c-10 {
  157. #address-cells = <1>;
  158. #size-cells = <0>;
  159. compatible = "i2c-gpio";
  160. status = "disabled";
  161. scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  162. sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  163. i2c-gpio,delay-us = <5>;
  164. };
  165. /*
  166. * A fallback to GPIO is provided for I2C1.
  167. */
  168. i2chdmi: i2c-11 {
  169. compatible = "i2c-demux-pinctrl";
  170. i2c-parent = <&i2c1>, <&gpioi2c1>;
  171. i2c-bus-name = "i2c-hdmi";
  172. #address-cells = <1>;
  173. #size-cells = <0>;
  174. composite-in@20 {
  175. compatible = "adi,adv7180";
  176. reg = <0x20>;
  177. port {
  178. adv7180: endpoint {
  179. bus-width = <8>;
  180. remote-endpoint = <&vin0ep>;
  181. };
  182. };
  183. };
  184. eeprom@50 {
  185. compatible = "renesas,r1ex24002", "atmel,24c02";
  186. reg = <0x50>;
  187. pagesize = <16>;
  188. };
  189. };
  190. /*
  191. * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
  192. * A fallback to GPIO is provided.
  193. */
  194. i2cexio4: i2c-14 {
  195. compatible = "i2c-demux-pinctrl";
  196. i2c-parent = <&i2c4>, <&gpioi2c4>;
  197. i2c-bus-name = "i2c-exio4";
  198. #address-cells = <1>;
  199. #size-cells = <0>;
  200. };
  201. };
  202. &pci0 {
  203. status = "okay";
  204. pinctrl-0 = <&usb0_pins>;
  205. pinctrl-names = "default";
  206. };
  207. &pci1 {
  208. status = "okay";
  209. pinctrl-0 = <&usb1_pins>;
  210. pinctrl-names = "default";
  211. };
  212. &usbphy {
  213. status = "okay";
  214. };
  215. &du {
  216. pinctrl-0 = <&du_pins>;
  217. pinctrl-names = "default";
  218. status = "okay";
  219. clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
  220. <&x13_clk>, <&x2_clk>;
  221. clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
  222. ports {
  223. port@1 {
  224. endpoint {
  225. remote-endpoint = <&adv7123_in>;
  226. };
  227. };
  228. };
  229. };
  230. &extal_clk {
  231. clock-frequency = <20000000>;
  232. };
  233. &pfc {
  234. pinctrl-0 = <&scif_clk_pins>;
  235. pinctrl-names = "default";
  236. du_pins: du {
  237. groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
  238. function = "du1";
  239. };
  240. scif2_pins: scif2 {
  241. groups = "scif2_data";
  242. function = "scif2";
  243. };
  244. scif_clk_pins: scif_clk {
  245. groups = "scif_clk";
  246. function = "scif_clk";
  247. };
  248. ether_pins: ether {
  249. groups = "eth_link", "eth_mdio", "eth_rmii";
  250. function = "eth";
  251. };
  252. phy1_pins: phy1 {
  253. groups = "intc_irq8";
  254. function = "intc";
  255. };
  256. i2c1_pins: i2c1 {
  257. groups = "i2c1";
  258. function = "i2c1";
  259. };
  260. i2c4_pins: i2c4 {
  261. groups = "i2c4";
  262. function = "i2c4";
  263. };
  264. vin0_pins: vin0 {
  265. groups = "vin0_data8", "vin0_clk";
  266. function = "vin0";
  267. };
  268. mmcif0_pins: mmcif0 {
  269. groups = "mmc_data8", "mmc_ctrl";
  270. function = "mmc";
  271. };
  272. sdhi0_pins: sd0 {
  273. groups = "sdhi0_data4", "sdhi0_ctrl";
  274. function = "sdhi0";
  275. power-source = <3300>;
  276. };
  277. sdhi0_pins_uhs: sd0_uhs {
  278. groups = "sdhi0_data4", "sdhi0_ctrl";
  279. function = "sdhi0";
  280. power-source = <1800>;
  281. };
  282. sdhi1_pins: sd1 {
  283. groups = "sdhi1_data4", "sdhi1_ctrl";
  284. function = "sdhi1";
  285. power-source = <3300>;
  286. };
  287. sdhi1_pins_uhs: sd1_uhs {
  288. groups = "sdhi1_data4", "sdhi1_ctrl";
  289. function = "sdhi1";
  290. power-source = <1800>;
  291. };
  292. usb0_pins: usb0 {
  293. groups = "usb0";
  294. function = "usb0";
  295. };
  296. usb1_pins: usb1 {
  297. groups = "usb1";
  298. function = "usb1";
  299. };
  300. keyboard_pins: keyboard {
  301. pins = "GP_3_9", "GP_3_10", "GP_3_11", "GP_3_12";
  302. bias-pull-up;
  303. };
  304. };
  305. &cmt0 {
  306. status = "okay";
  307. };
  308. &pfc {
  309. qspi_pins: qspi {
  310. groups = "qspi_ctrl", "qspi_data4";
  311. function = "qspi";
  312. };
  313. };
  314. &ether {
  315. pinctrl-0 = <&ether_pins>, <&phy1_pins>;
  316. pinctrl-names = "default";
  317. phy-handle = <&phy1>;
  318. renesas,ether-link-active-low;
  319. status = "okay";
  320. phy1: ethernet-phy@1 {
  321. compatible = "ethernet-phy-id0022.1537",
  322. "ethernet-phy-ieee802.3-c22";
  323. reg = <1>;
  324. interrupt-parent = <&irqc0>;
  325. interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
  326. micrel,led-mode = <1>;
  327. reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
  328. };
  329. };
  330. &mmcif0 {
  331. pinctrl-0 = <&mmcif0_pins>;
  332. pinctrl-names = "default";
  333. vmmc-supply = <&d3_3v>;
  334. vqmmc-supply = <&d3_3v>;
  335. bus-width = <8>;
  336. non-removable;
  337. status = "okay";
  338. };
  339. &rwdt {
  340. timeout-sec = <60>;
  341. status = "okay";
  342. };
  343. &sdhi0 {
  344. pinctrl-0 = <&sdhi0_pins>;
  345. pinctrl-1 = <&sdhi0_pins_uhs>;
  346. pinctrl-names = "default", "state_uhs";
  347. vmmc-supply = <&vcc_sdhi0>;
  348. vqmmc-supply = <&vccq_sdhi0>;
  349. cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
  350. wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  351. sd-uhs-sdr50;
  352. sd-uhs-sdr104;
  353. status = "okay";
  354. };
  355. &sdhi1 {
  356. pinctrl-0 = <&sdhi1_pins>;
  357. pinctrl-1 = <&sdhi1_pins_uhs>;
  358. pinctrl-names = "default", "state_uhs";
  359. vmmc-supply = <&vcc_sdhi1>;
  360. vqmmc-supply = <&vccq_sdhi1>;
  361. cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
  362. wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
  363. sd-uhs-sdr50;
  364. status = "okay";
  365. };
  366. &i2c1 {
  367. pinctrl-0 = <&i2c1_pins>;
  368. pinctrl-names = "i2c-hdmi";
  369. clock-frequency = <400000>;
  370. };
  371. &i2c4 {
  372. pinctrl-0 = <&i2c4_pins>;
  373. pinctrl-names = "i2c-exio4";
  374. };
  375. &i2c7 {
  376. status = "okay";
  377. clock-frequency = <100000>;
  378. pmic@58 {
  379. compatible = "dlg,da9063";
  380. reg = <0x58>;
  381. interrupt-parent = <&gpio3>;
  382. interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
  383. interrupt-controller;
  384. rtc {
  385. compatible = "dlg,da9063-rtc";
  386. };
  387. watchdog {
  388. compatible = "dlg,da9063-watchdog";
  389. };
  390. };
  391. };
  392. &vin0 {
  393. status = "okay";
  394. pinctrl-0 = <&vin0_pins>;
  395. pinctrl-names = "default";
  396. port {
  397. vin0ep: endpoint {
  398. remote-endpoint = <&adv7180>;
  399. bus-width = <8>;
  400. };
  401. };
  402. };
  403. &scif2 {
  404. pinctrl-0 = <&scif2_pins>;
  405. pinctrl-names = "default";
  406. status = "okay";
  407. };
  408. &scif_clk {
  409. clock-frequency = <14745600>;
  410. };
  411. &qspi {
  412. pinctrl-0 = <&qspi_pins>;
  413. pinctrl-names = "default";
  414. status = "okay";
  415. flash@0 {
  416. compatible = "spansion,s25fl512s", "jedec,spi-nor";
  417. reg = <0>;
  418. spi-max-frequency = <30000000>;
  419. spi-tx-bus-width = <4>;
  420. spi-rx-bus-width = <4>;
  421. spi-cpol;
  422. spi-cpha;
  423. m25p,fast-read;
  424. partitions {
  425. compatible = "fixed-partitions";
  426. #address-cells = <1>;
  427. #size-cells = <1>;
  428. partition@0 {
  429. label = "loader";
  430. reg = <0x00000000 0x00040000>;
  431. read-only;
  432. };
  433. partition@40000 {
  434. label = "system";
  435. reg = <0x00040000 0x00040000>;
  436. read-only;
  437. };
  438. partition@80000 {
  439. label = "user";
  440. reg = <0x00080000 0x03f80000>;
  441. };
  442. };
  443. };
  444. };