r8a7742-iwg21d-q7-dbcm-ca.dts 6.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the iWave-RZ/G1H Qseven board development
  4. * platform with camera daughter board
  5. *
  6. * Copyright (C) 2020 Renesas Electronics Corp.
  7. */
  8. /dts-v1/;
  9. #include "r8a7742-iwg21d-q7.dts"
  10. / {
  11. model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
  12. compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
  13. aliases {
  14. serial0 = &scif0;
  15. serial1 = &scif1;
  16. serial3 = &scifb1;
  17. serial5 = &hscif0;
  18. ethernet1 = &ether;
  19. };
  20. mclk_cam1: mclk-cam1 {
  21. compatible = "fixed-clock";
  22. #clock-cells = <0>;
  23. clock-frequency = <26000000>;
  24. };
  25. mclk_cam2: mclk-cam2 {
  26. compatible = "fixed-clock";
  27. #clock-cells = <0>;
  28. clock-frequency = <26000000>;
  29. };
  30. mclk_cam3: mclk-cam3 {
  31. compatible = "fixed-clock";
  32. #clock-cells = <0>;
  33. clock-frequency = <26000000>;
  34. };
  35. mclk_cam4: mclk-cam4 {
  36. compatible = "fixed-clock";
  37. #clock-cells = <0>;
  38. clock-frequency = <26000000>;
  39. };
  40. reg_1p8v: 1p8v {
  41. compatible = "regulator-fixed";
  42. regulator-name = "1P8V";
  43. regulator-min-microvolt = <1800000>;
  44. regulator-max-microvolt = <1800000>;
  45. regulator-always-on;
  46. };
  47. reg_2p8v: 2p8v {
  48. compatible = "regulator-fixed";
  49. regulator-name = "2P8V";
  50. regulator-min-microvolt = <2800000>;
  51. regulator-max-microvolt = <2800000>;
  52. regulator-always-on;
  53. };
  54. };
  55. &avb {
  56. /* Pins shared with VIN0, keep status disabled */
  57. status = "disabled";
  58. };
  59. &can0 {
  60. pinctrl-0 = <&can0_pins>;
  61. pinctrl-names = "default";
  62. status = "okay";
  63. };
  64. &ether {
  65. pinctrl-0 = <&ether_pins>;
  66. pinctrl-names = "default";
  67. phy-handle = <&phy1>;
  68. renesas,ether-link-active-low;
  69. status = "okay";
  70. phy1: ethernet-phy@1 {
  71. compatible = "ethernet-phy-id0022.1560",
  72. "ethernet-phy-ieee802.3-c22";
  73. reg = <1>;
  74. micrel,led-mode = <1>;
  75. };
  76. };
  77. &gpio0 {
  78. /* Disable hogging GP0_18 to output LOW */
  79. /delete-node/ qspi-en-hog;
  80. /* Hog GP0_18 to output HIGH to enable VIN2 */
  81. vin2-en-hog {
  82. gpio-hog;
  83. gpios = <18 GPIO_ACTIVE_HIGH>;
  84. output-high;
  85. line-name = "VIN2_EN";
  86. };
  87. };
  88. &hscif0 {
  89. pinctrl-0 = <&hscif0_pins>;
  90. pinctrl-names = "default";
  91. uart-has-rtscts;
  92. status = "okay";
  93. };
  94. &i2c1 {
  95. pinctrl-0 = <&i2c1_pins>;
  96. pinctrl-names = "default";
  97. /* status set to "okay" when needed by camera configuration below */
  98. clock-frequency = <400000>;
  99. };
  100. &i2c3 {
  101. pinctrl-0 = <&i2c3_pins>;
  102. pinctrl-names = "default";
  103. /* status set to "okay" when needed by camera configuration below */
  104. clock-frequency = <400000>;
  105. };
  106. &pfc {
  107. can0_pins: can0 {
  108. groups = "can0_data_d";
  109. function = "can0";
  110. };
  111. ether_pins: ether {
  112. groups = "eth_mdio", "eth_rmii";
  113. function = "eth";
  114. };
  115. hscif0_pins: hscif0 {
  116. groups = "hscif0_data", "hscif0_ctrl";
  117. function = "hscif0";
  118. };
  119. i2c1_pins: i2c1 {
  120. groups = "i2c1_c";
  121. function = "i2c1";
  122. };
  123. i2c3_pins: i2c3 {
  124. groups = "i2c3";
  125. function = "i2c3";
  126. };
  127. scif0_pins: scif0 {
  128. groups = "scif0_data";
  129. function = "scif0";
  130. };
  131. scif1_pins: scif1 {
  132. groups = "scif1_data";
  133. function = "scif1";
  134. };
  135. scifb1_pins: scifb1 {
  136. groups = "scifb1_data";
  137. function = "scifb1";
  138. };
  139. vin0_8bit_pins: vin0 {
  140. groups = "vin0_data8", "vin0_clk", "vin0_sync";
  141. function = "vin0";
  142. };
  143. vin1_8bit_pins: vin1 {
  144. groups = "vin1_data8_b", "vin1_clk_b", "vin1_sync_b";
  145. function = "vin1";
  146. };
  147. vin2_pins: vin2 {
  148. groups = "vin2_g8", "vin2_clk";
  149. function = "vin2";
  150. };
  151. vin3_pins: vin3 {
  152. groups = "vin3_data8", "vin3_clk", "vin3_sync";
  153. function = "vin3";
  154. };
  155. };
  156. &qspi {
  157. /* Pins shared with VIN2, keep status disabled */
  158. status = "disabled";
  159. };
  160. &scif0 {
  161. pinctrl-0 = <&scif0_pins>;
  162. pinctrl-names = "default";
  163. status = "okay";
  164. };
  165. &scif1 {
  166. pinctrl-0 = <&scif1_pins>;
  167. pinctrl-names = "default";
  168. status = "okay";
  169. };
  170. &scifb1 {
  171. pinctrl-0 = <&scifb1_pins>;
  172. pinctrl-names = "default";
  173. status = "okay";
  174. rts-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
  175. cts-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
  176. };
  177. /*
  178. * Below configuration ties VINx endpoints to ov5640/ov7725 camera endpoints
  179. *
  180. * (un)comment the #include statements to change configuration
  181. */
  182. /* 8bit CMOS Camera 1 (J13) */
  183. #define CAM_PARENT_I2C i2c0
  184. #define MCLK_CAM mclk_cam1
  185. #define CAM_EP cam0ep
  186. #define VIN_EP vin0ep
  187. #undef CAM_ENABLED
  188. #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
  189. //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
  190. #ifdef CAM_ENABLED
  191. &vin0 {
  192. /*
  193. * Set SW2 switch on the SOM to 'ON'
  194. * Set SW1 switch on camera board to 'OFF' as we are using 8bit mode
  195. */
  196. status = "okay";
  197. pinctrl-0 = <&vin0_8bit_pins>;
  198. pinctrl-names = "default";
  199. port {
  200. vin0ep: endpoint {
  201. remote-endpoint = <&cam0ep>;
  202. bus-width = <8>;
  203. bus-type = <6>;
  204. };
  205. };
  206. };
  207. #endif /* CAM_ENABLED */
  208. #undef CAM_PARENT_I2C
  209. #undef MCLK_CAM
  210. #undef CAM_EP
  211. #undef VIN_EP
  212. /* 8bit CMOS Camera 2 (J14) */
  213. #define CAM_PARENT_I2C i2c1
  214. #define MCLK_CAM mclk_cam2
  215. #define CAM_EP cam1ep
  216. #define VIN_EP vin1ep
  217. #undef CAM_ENABLED
  218. #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
  219. //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
  220. #ifdef CAM_ENABLED
  221. &vin1 {
  222. /* Set SW1 switch on the SOM to 'ON' */
  223. status = "okay";
  224. pinctrl-0 = <&vin1_8bit_pins>;
  225. pinctrl-names = "default";
  226. port {
  227. vin1ep: endpoint {
  228. remote-endpoint = <&cam1ep>;
  229. bus-width = <8>;
  230. bus-type = <6>;
  231. };
  232. };
  233. };
  234. #endif /* CAM_ENABLED */
  235. #undef CAM_PARENT_I2C
  236. #undef MCLK_CAM
  237. #undef CAM_EP
  238. #undef VIN_EP
  239. /* 8bit CMOS Camera 3 (J12) */
  240. #define CAM_PARENT_I2C i2c2
  241. #define MCLK_CAM mclk_cam3
  242. #define CAM_EP cam2ep
  243. #define VIN_EP vin2ep
  244. #undef CAM_ENABLED
  245. #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
  246. //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
  247. #ifdef CAM_ENABLED
  248. &vin2 {
  249. status = "okay";
  250. pinctrl-0 = <&vin2_pins>;
  251. pinctrl-names = "default";
  252. port {
  253. vin2ep: endpoint {
  254. remote-endpoint = <&cam2ep>;
  255. bus-width = <8>;
  256. data-shift = <8>;
  257. bus-type = <6>;
  258. };
  259. };
  260. };
  261. #endif /* CAM_ENABLED */
  262. #undef CAM_PARENT_I2C
  263. #undef MCLK_CAM
  264. #undef CAM_EP
  265. #undef VIN_EP
  266. /* 8bit CMOS Camera 4 (J11) */
  267. #define CAM_PARENT_I2C i2c3
  268. #define MCLK_CAM mclk_cam4
  269. #define CAM_EP cam3ep
  270. #define VIN_EP vin3ep
  271. #undef CAM_ENABLED
  272. #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
  273. //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
  274. #ifdef CAM_ENABLED
  275. &vin3 {
  276. status = "okay";
  277. pinctrl-0 = <&vin3_pins>;
  278. pinctrl-names = "default";
  279. port {
  280. vin3ep: endpoint {
  281. remote-endpoint = <&cam3ep>;
  282. bus-width = <8>;
  283. bus-type = <6>;
  284. };
  285. };
  286. };
  287. #endif /* CAM_ENABLED */
  288. #undef CAM_PARENT_I2C
  289. #undef MCLK_CAM
  290. #undef CAM_EP
  291. #undef VIN_EP