r7s72100-rskrza1.dts 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the RZ/A1H RSK board
  4. *
  5. * Copyright (C) 2016 Renesas Electronics
  6. */
  7. /dts-v1/;
  8. #include "r7s72100.dtsi"
  9. #include <dt-bindings/gpio/gpio.h>
  10. #include <dt-bindings/input/input.h>
  11. #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
  12. / {
  13. model = "RSKRZA1";
  14. compatible = "renesas,rskrza1", "renesas,r7s72100";
  15. aliases {
  16. serial0 = &scif2;
  17. };
  18. chosen {
  19. bootargs = "ignore_loglevel";
  20. stdout-path = "serial0:115200n8";
  21. };
  22. memory@8000000 {
  23. device_type = "memory";
  24. reg = <0x08000000 0x02000000>;
  25. };
  26. keyboard {
  27. compatible = "gpio-keys";
  28. pinctrl-names = "default";
  29. pinctrl-0 = <&keyboard_pins>;
  30. key-1 {
  31. interrupt-parent = <&irqc>;
  32. interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
  33. linux,code = <KEY_1>;
  34. label = "SW1";
  35. wakeup-source;
  36. };
  37. key-2 {
  38. interrupt-parent = <&irqc>;
  39. interrupts = <2 IRQ_TYPE_EDGE_BOTH>;
  40. linux,code = <KEY_2>;
  41. label = "SW2";
  42. wakeup-source;
  43. };
  44. key-3 {
  45. interrupt-parent = <&irqc>;
  46. interrupts = <5 IRQ_TYPE_EDGE_BOTH>;
  47. linux,code = <KEY_3>;
  48. label = "SW3";
  49. wakeup-source;
  50. };
  51. };
  52. lbsc {
  53. #address-cells = <1>;
  54. #size-cells = <1>;
  55. };
  56. leds {
  57. compatible = "gpio-leds";
  58. led0 {
  59. gpios = <&port7 1 GPIO_ACTIVE_LOW>;
  60. };
  61. led1 {
  62. gpios = <&io_expander1 0 GPIO_ACTIVE_LOW>;
  63. };
  64. led2 {
  65. gpios = <&io_expander1 1 GPIO_ACTIVE_LOW>;
  66. };
  67. led3 {
  68. gpios = <&io_expander1 2 GPIO_ACTIVE_LOW>;
  69. };
  70. };
  71. };
  72. &extal_clk {
  73. clock-frequency = <13330000>;
  74. };
  75. &i2c3 {
  76. pinctrl-names = "default";
  77. pinctrl-0 = <&i2c3_pins>;
  78. status = "okay";
  79. clock-frequency = <400000>;
  80. io_expander1: gpio@20 {
  81. compatible = "onnn,cat9554";
  82. reg = <0x20>;
  83. gpio-controller;
  84. #gpio-cells = <2>;
  85. };
  86. io_expander2: gpio@21 {
  87. compatible = "onnn,cat9554";
  88. reg = <0x21>;
  89. gpio-controller;
  90. #gpio-cells = <2>;
  91. };
  92. eeprom@50 {
  93. compatible = "renesas,r1ex24016", "atmel,24c16";
  94. reg = <0x50>;
  95. pagesize = <16>;
  96. };
  97. };
  98. &usb_x1_clk {
  99. clock-frequency = <48000000>;
  100. };
  101. &rtc_x1_clk {
  102. clock-frequency = <32768>;
  103. };
  104. &pinctrl {
  105. /* RIIC ch3 (Port Expander, EEPROM (MAC Addr), Audio Codec) */
  106. i2c3_pins: i2c3 {
  107. pinmux = <RZA1_PINMUX(1, 6, 1)>, /* RIIC3SCL */
  108. <RZA1_PINMUX(1, 7, 1)>; /* RIIC3SDA */
  109. };
  110. keyboard_pins: keyboard {
  111. pinmux = <RZA1_PINMUX(1, 9, 3)>, /* IRQ3 */
  112. <RZA1_PINMUX(1, 8, 3)>, /* IRQ2 */
  113. <RZA1_PINMUX(1, 11, 3)>; /* IRQ5 */
  114. };
  115. /* Serial Console */
  116. scif2_pins: serial2 {
  117. pinmux = <RZA1_PINMUX(3, 0, 6)>, /* TxD2 */
  118. <RZA1_PINMUX(3, 2, 4)>; /* RxD2 */
  119. };
  120. /* Ethernet */
  121. ether_pins: ether {
  122. /* Ethernet on Ports 1,2,3,5 */
  123. pinmux = <RZA1_PINMUX(1, 14, 4)>, /* ET_COL */
  124. <RZA1_PINMUX(5, 9, 2)>, /* ET_MDC */
  125. <RZA1_PINMUX(3, 3, 2)>, /* ET_MDIO */
  126. <RZA1_PINMUX(3, 4, 2)>, /* ET_RXCLK */
  127. <RZA1_PINMUX(3, 5, 2)>, /* ET_RXER */
  128. <RZA1_PINMUX(3, 6, 2)>, /* ET_RXDV */
  129. <RZA1_PINMUX(2, 0, 2)>, /* ET_TXCLK */
  130. <RZA1_PINMUX(2, 1, 2)>, /* ET_TXER */
  131. <RZA1_PINMUX(2, 2, 2)>, /* ET_TXEN */
  132. <RZA1_PINMUX(2, 3, 2)>, /* ET_CRS */
  133. <RZA1_PINMUX(2, 4, 2)>, /* ET_TXD0 */
  134. <RZA1_PINMUX(2, 5, 2)>, /* ET_TXD1 */
  135. <RZA1_PINMUX(2, 6, 2)>, /* ET_TXD2 */
  136. <RZA1_PINMUX(2, 7, 2)>, /* ET_TXD3 */
  137. <RZA1_PINMUX(2, 8, 2)>, /* ET_RXD0 */
  138. <RZA1_PINMUX(2, 9, 2)>, /* ET_RXD1 */
  139. <RZA1_PINMUX(2, 10, 2)>, /* ET_RXD2 */
  140. <RZA1_PINMUX(2, 11, 2)>; /* ET_RXD3 */
  141. };
  142. /* SDHI ch1 on CN1 */
  143. sdhi1_pins: sdhi1 {
  144. pinmux = <RZA1_PINMUX(3, 8, 7)>, /* SD_CD_1 */
  145. <RZA1_PINMUX(3, 9, 7)>, /* SD_WP_1 */
  146. <RZA1_PINMUX(3, 10, 7)>, /* SD_D1_1 */
  147. <RZA1_PINMUX(3, 11, 7)>, /* SD_D0_1 */
  148. <RZA1_PINMUX(3, 12, 7)>, /* SD_CLK_1 */
  149. <RZA1_PINMUX(3, 13, 7)>, /* SD_CMD_1 */
  150. <RZA1_PINMUX(3, 14, 7)>, /* SD_D3_1 */
  151. <RZA1_PINMUX(3, 15, 7)>; /* SD_D2_1 */
  152. };
  153. };
  154. &mtu2 {
  155. status = "okay";
  156. };
  157. &ether {
  158. pinctrl-names = "default";
  159. pinctrl-0 = <&ether_pins>;
  160. status = "okay";
  161. renesas,no-ether-link;
  162. phy-handle = <&phy0>;
  163. phy0: ethernet-phy@0 {
  164. compatible = "ethernet-phy-idb824.2814",
  165. "ethernet-phy-ieee802.3-c22";
  166. reg = <0>;
  167. };
  168. };
  169. &sdhi1 {
  170. pinctrl-names = "default";
  171. pinctrl-0 = <&sdhi1_pins>;
  172. bus-width = <4>;
  173. status = "okay";
  174. };
  175. &ostm0 {
  176. status = "okay";
  177. };
  178. &ostm1 {
  179. status = "okay";
  180. };
  181. &rtc {
  182. status = "okay";
  183. };
  184. &scif2 {
  185. pinctrl-names = "default";
  186. pinctrl-0 = <&scif2_pins>;
  187. status = "okay";
  188. };