r7s72100-genmai.dts 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the Genmai board
  4. *
  5. * Copyright (C) 2013-14 Renesas Solutions Corp.
  6. * Copyright (C) 2014 Wolfram Sang, Sang Engineering <[email protected]>
  7. */
  8. /dts-v1/;
  9. #include "r7s72100.dtsi"
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
  12. / {
  13. model = "Genmai";
  14. compatible = "renesas,genmai", "renesas,r7s72100";
  15. aliases {
  16. serial0 = &scif2;
  17. };
  18. chosen {
  19. bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  20. stdout-path = "serial0:115200n8";
  21. };
  22. memory@8000000 {
  23. device_type = "memory";
  24. reg = <0x08000000 0x08000000>;
  25. };
  26. lbsc {
  27. #address-cells = <1>;
  28. #size-cells = <1>;
  29. };
  30. leds {
  31. status = "okay";
  32. compatible = "gpio-leds";
  33. led1 {
  34. gpios = <&port4 10 GPIO_ACTIVE_LOW>;
  35. };
  36. led2 {
  37. gpios = <&port4 11 GPIO_ACTIVE_LOW>;
  38. };
  39. };
  40. };
  41. &pinctrl {
  42. scif2_pins: serial2 {
  43. /* P3_0 as TxD2; P3_2 as RxD2 */
  44. pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
  45. };
  46. i2c2_pins: i2c2 {
  47. /* RIIC2: P1_4 as SCL, P1_5 as SDA */
  48. pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
  49. };
  50. ether_pins: ether {
  51. /* Ethernet on Ports 1,2,3,5 */
  52. pinmux = <RZA1_PINMUX(1, 14, 4)>,/* P1_14 = ET_COL */
  53. <RZA1_PINMUX(5, 9, 2)>, /* P5_9 = ET_MDC */
  54. <RZA1_PINMUX(3, 3, 2)>, /* P3_3 = ET_MDIO */
  55. <RZA1_PINMUX(3, 4, 2)>, /* P3_4 = ET_RXCLK */
  56. <RZA1_PINMUX(3, 5, 2)>, /* P3_5 = ET_RXER */
  57. <RZA1_PINMUX(3, 6, 2)>, /* P3_6 = ET_RXDV */
  58. <RZA1_PINMUX(2, 0, 2)>, /* P2_0 = ET_TXCLK */
  59. <RZA1_PINMUX(2, 1, 2)>, /* P2_1 = ET_TXER */
  60. <RZA1_PINMUX(2, 2, 2)>, /* P2_2 = ET_TXEN */
  61. <RZA1_PINMUX(2, 3, 2)>, /* P2_3 = ET_CRS */
  62. <RZA1_PINMUX(2, 4, 2)>, /* P2_4 = ET_TXD0 */
  63. <RZA1_PINMUX(2, 5, 2)>, /* P2_5 = ET_TXD1 */
  64. <RZA1_PINMUX(2, 6, 2)>, /* P2_6 = ET_TXD2 */
  65. <RZA1_PINMUX(2, 7, 2)>, /* P2_7 = ET_TXD3 */
  66. <RZA1_PINMUX(2, 8, 2)>, /* P2_8 = ET_RXD0 */
  67. <RZA1_PINMUX(2, 9, 2)>, /* P2_9 = ET_RXD1 */
  68. <RZA1_PINMUX(2, 10, 2)>,/* P2_10 = ET_RXD2 */
  69. <RZA1_PINMUX(2, 11, 2)>;/* P2_11 = ET_RXD3 */
  70. };
  71. };
  72. &extal_clk {
  73. clock-frequency = <13330000>;
  74. };
  75. &usb_x1_clk {
  76. clock-frequency = <48000000>;
  77. };
  78. &rtc_x1_clk {
  79. clock-frequency = <32768>;
  80. };
  81. &mtu2 {
  82. status = "okay";
  83. };
  84. &ether {
  85. pinctrl-names = "default";
  86. pinctrl-0 = <&ether_pins>;
  87. status = "okay";
  88. renesas,no-ether-link;
  89. phy-handle = <&phy0>;
  90. phy0: ethernet-phy@0 {
  91. compatible = "ethernet-phy-idb824.2814",
  92. "ethernet-phy-ieee802.3-c22";
  93. reg = <0>;
  94. };
  95. };
  96. &i2c2 {
  97. status = "okay";
  98. clock-frequency = <400000>;
  99. pinctrl-names = "default";
  100. pinctrl-0 = <&i2c2_pins>;
  101. eeprom@50 {
  102. compatible = "renesas,r1ex24128", "atmel,24c128";
  103. reg = <0x50>;
  104. pagesize = <64>;
  105. };
  106. };
  107. &rtc {
  108. status = "okay";
  109. };
  110. &scif2 {
  111. pinctrl-names = "default";
  112. pinctrl-0 = <&scif2_pins>;
  113. status = "okay";
  114. };
  115. &spi4 {
  116. status = "okay";
  117. codec: codec@0 {
  118. compatible = "wlf,wm8978";
  119. reg = <0>;
  120. spi-max-frequency = <5000000>;
  121. };
  122. };