qcom-mdm9615-wp8548.dtsi 4.0 KB

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  1. /*
  2. * Device Tree Source for Sierra Wireless WP8548 Module
  3. *
  4. * Copyright (C) 2016 BayLibre, SAS.
  5. * Author : Neil Armstrong <[email protected]>
  6. *
  7. * This file is dual-licensed: you can use it either under the terms
  8. * of the GPL or the X11 license, at your option. Note that this dual
  9. * licensing only applies to this file, and not this project as a
  10. * whole.
  11. *
  12. * a) This file is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of the
  15. * License, or (at your option) any later version.
  16. *
  17. * This file is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * Or, alternatively,
  23. *
  24. * b) Permission is hereby granted, free of charge, to any person
  25. * obtaining a copy of this software and associated documentation
  26. * files (the "Software"), to deal in the Software without
  27. * restriction, including without limitation the rights to use,
  28. * copy, modify, merge, publish, distribute, sublicense, and/or
  29. * sell copies of the Software, and to permit persons to whom the
  30. * Software is furnished to do so, subject to the following
  31. * conditions:
  32. *
  33. * The above copyright notice and this permission notice shall be
  34. * included in all copies or substantial portions of the Software.
  35. *
  36. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  37. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  38. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  39. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  40. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  41. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  42. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  43. * OTHER DEALINGS IN THE SOFTWARE.
  44. */
  45. #include "qcom-mdm9615.dtsi"
  46. / {
  47. model = "Sierra Wireless WP8548 Module";
  48. compatible = "swir,wp8548", "qcom,mdm9615";
  49. memory@48000000 {
  50. device_type = "memory";
  51. reg = <0x48000000 0x7F00000>;
  52. };
  53. };
  54. &msmgpio {
  55. pinctrl-0 = <&reset_out_pins>;
  56. pinctrl-names = "default";
  57. gsbi3_pins: gsbi3_pins {
  58. mux {
  59. pins = "gpio8", "gpio9", "gpio10", "gpio11";
  60. function = "gsbi3";
  61. drive-strength = <8>;
  62. bias-disable;
  63. };
  64. };
  65. gsbi4_pins: gsbi4_pins {
  66. mux {
  67. pins = "gpio12", "gpio13", "gpio14", "gpio15";
  68. function = "gsbi4";
  69. drive-strength = <8>;
  70. bias-disable;
  71. };
  72. };
  73. gsbi5_i2c_pins: gsbi5_i2c_pins {
  74. pin16 {
  75. pins = "gpio16";
  76. function = "gsbi5_i2c";
  77. drive-strength = <8>;
  78. bias-disable;
  79. };
  80. pin17 {
  81. pins = "gpio17";
  82. function = "gsbi5_i2c";
  83. drive-strength = <2>;
  84. bias-disable;
  85. };
  86. };
  87. gsbi5_uart_pins: gsbi5_uart_pins {
  88. mux {
  89. pins = "gpio18", "gpio19";
  90. function = "gsbi5_uart";
  91. drive-strength = <8>;
  92. bias-disable;
  93. };
  94. };
  95. reset_out_pins: reset_out_pins {
  96. pins {
  97. pins = "gpio66";
  98. function = "gpio";
  99. drive-strength = <2>;
  100. bias-pull-up;
  101. output-high;
  102. };
  103. };
  104. };
  105. &pmicgpio {
  106. usb_vbus_5v_pins: usb-vbus-5v-state {
  107. pins = "gpio4";
  108. function = "normal";
  109. output-high;
  110. bias-disable;
  111. qcom,drive-strength = <1>;
  112. power-source = <2>;
  113. };
  114. };
  115. &gsbi3 {
  116. status = "okay";
  117. qcom,mode = <GSBI_PROT_SPI>;
  118. };
  119. &gsbi3_spi {
  120. status = "okay";
  121. pinctrl-0 = <&gsbi3_pins>;
  122. pinctrl-names = "default";
  123. assigned-clocks = <&gcc GSBI3_QUP_CLK>;
  124. assigned-clock-rates = <24000000>;
  125. };
  126. &gsbi4 {
  127. status = "okay";
  128. qcom,mode = <GSBI_PROT_UART_W_FC>;
  129. };
  130. &gsbi4_serial {
  131. status = "okay";
  132. pinctrl-0 = <&gsbi4_pins>;
  133. pinctrl-names = "default";
  134. };
  135. &gsbi5 {
  136. status = "okay";
  137. qcom,mode = <GSBI_PROT_I2C_UART>;
  138. };
  139. &gsbi5_i2c {
  140. status = "okay";
  141. clock-frequency = <200000>;
  142. pinctrl-0 = <&gsbi5_i2c_pins>;
  143. pinctrl-names = "default";
  144. };
  145. &gsbi5_serial {
  146. status = "okay";
  147. pinctrl-0 = <&gsbi5_uart_pins>;
  148. pinctrl-names = "default";
  149. };
  150. &sdcc1 {
  151. status = "okay";
  152. };