qcom-ipq4018-jalapeno.dts 3.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. // Copyright (c) 2018, Robert Marko <[email protected]>
  3. #include "qcom-ipq4019.dtsi"
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. / {
  7. model = "8devices Jalapeno";
  8. compatible = "8dev,jalapeno";
  9. };
  10. &tlmm {
  11. mdio_pins: mdio_pinmux {
  12. pinmux_1 {
  13. pins = "gpio53";
  14. function = "mdio";
  15. };
  16. pinmux_2 {
  17. pins = "gpio52";
  18. function = "mdc";
  19. };
  20. pinconf {
  21. pins = "gpio52", "gpio53";
  22. bias-pull-up;
  23. };
  24. };
  25. serial_pins: serial_pinmux {
  26. mux {
  27. pins = "gpio60", "gpio61";
  28. function = "blsp_uart0";
  29. bias-disable;
  30. };
  31. };
  32. spi_0_pins: spi_0_pinmux {
  33. pin {
  34. function = "blsp_spi0";
  35. pins = "gpio55", "gpio56", "gpio57";
  36. drive-strength = <2>;
  37. bias-disable;
  38. };
  39. pin_cs {
  40. function = "gpio";
  41. pins = "gpio54", "gpio59";
  42. drive-strength = <2>;
  43. bias-disable;
  44. output-high;
  45. };
  46. };
  47. };
  48. &watchdog {
  49. status = "okay";
  50. };
  51. &prng {
  52. status = "okay";
  53. };
  54. &blsp_dma {
  55. status = "okay";
  56. };
  57. &blsp1_spi1 {
  58. status = "okay";
  59. pinctrl-0 = <&spi_0_pins>;
  60. pinctrl-names = "default";
  61. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
  62. flash@0 {
  63. status = "okay";
  64. compatible = "jedec,spi-nor";
  65. reg = <0>;
  66. spi-max-frequency = <24000000>;
  67. partitions {
  68. compatible = "fixed-partitions";
  69. #address-cells = <1>;
  70. #size-cells = <1>;
  71. partition@0 {
  72. label = "SBL1";
  73. reg = <0x00000000 0x00040000>;
  74. read-only;
  75. };
  76. partition@40000 {
  77. label = "MIBIB";
  78. reg = <0x00040000 0x00020000>;
  79. read-only;
  80. };
  81. partition@60000 {
  82. label = "QSEE";
  83. reg = <0x00060000 0x00060000>;
  84. read-only;
  85. };
  86. partition@c0000 {
  87. label = "CDT";
  88. reg = <0x000c0000 0x00010000>;
  89. read-only;
  90. };
  91. partition@d0000 {
  92. label = "DDRPARAMS";
  93. reg = <0x000d0000 0x00010000>;
  94. read-only;
  95. };
  96. partition@e0000 {
  97. label = "u-boot-env";
  98. reg = <0x000e0000 0x00010000>;
  99. };
  100. partition@f0000 {
  101. label = "u-boot";
  102. reg = <0x000f0000 0x00080000>;
  103. read-only;
  104. };
  105. partition@170000 {
  106. label = "ART";
  107. reg = <0x00170000 0x00010000>;
  108. read-only;
  109. };
  110. };
  111. };
  112. spi-nand@1 {
  113. status = "okay";
  114. compatible = "spi-nand";
  115. reg = <1>;
  116. spi-max-frequency = <24000000>;
  117. partitions {
  118. compatible = "fixed-partitions";
  119. #address-cells = <1>;
  120. #size-cells = <1>;
  121. partition@0 {
  122. label = "ubi1";
  123. reg = <0x00000000 0x04000000>;
  124. };
  125. partition@4000000 {
  126. label = "ubi2";
  127. reg = <0x04000000 0x04000000>;
  128. };
  129. };
  130. };
  131. };
  132. &blsp1_uart1 {
  133. status = "okay";
  134. pinctrl-0 = <&serial_pins>;
  135. pinctrl-names = "default";
  136. };
  137. &cryptobam {
  138. status = "okay";
  139. };
  140. &crypto {
  141. status = "okay";
  142. };
  143. &mdio {
  144. status = "okay";
  145. pinctrl-0 = <&mdio_pins>;
  146. pinctrl-names = "default";
  147. };
  148. &wifi0 {
  149. status = "okay";
  150. qcom,ath10k-calibration-variant = "8devices-Jalapeno";
  151. };
  152. &wifi1 {
  153. status = "okay";
  154. qcom,ath10k-calibration-variant = "8devices-Jalapeno";
  155. };
  156. &usb3_ss_phy {
  157. status = "okay";
  158. };
  159. &usb3_hs_phy {
  160. status = "okay";
  161. };
  162. &usb3 {
  163. status = "okay";
  164. };
  165. &usb2_hs_phy {
  166. status = "okay";
  167. };
  168. &usb2 {
  169. status = "okay";
  170. };