pxa27x.dtsi 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* The pxa3xx skeleton simply augments the 2xx version */
  3. #include "pxa2xx.dtsi"
  4. #include "dt-bindings/clock/pxa-clock.h"
  5. / {
  6. model = "Marvell PXA27x familiy SoC";
  7. compatible = "marvell,pxa27x";
  8. pxabus {
  9. pdma: dma-controller@40000000 {
  10. compatible = "marvell,pdma-1.0";
  11. reg = <0x40000000 0x10000>;
  12. interrupts = <25>;
  13. #dma-cells = <2>;
  14. /* For backwards compatibility: */
  15. #dma-channels = <32>;
  16. dma-channels = <32>;
  17. #dma-requests = <75>;
  18. dma-requests = <75>;
  19. status = "okay";
  20. };
  21. pxairq: interrupt-controller@40d00000 {
  22. marvell,intc-priority;
  23. marvell,intc-nr-irqs = <34>;
  24. };
  25. pinctrl: pinctrl@40e00000 {
  26. reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
  27. 0x40f00020 0x10>;
  28. compatible = "marvell,pxa27x-pinctrl";
  29. };
  30. gpio: gpio@40e00000 {
  31. compatible = "intel,pxa27x-gpio";
  32. gpio-ranges = <&pinctrl 0 0 128>;
  33. clocks = <&clks CLK_NONE>;
  34. };
  35. usb0: usb@4c000000 {
  36. compatible = "marvell,pxa-ohci";
  37. reg = <0x4c000000 0x10000>;
  38. interrupts = <3>;
  39. clocks = <&clks CLK_USBHOST>;
  40. status = "disabled";
  41. };
  42. pwm0: pwm@40b00000 {
  43. compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  44. reg = <0x40b00000 0x10>;
  45. #pwm-cells = <1>;
  46. clocks = <&clks CLK_PWM0>;
  47. };
  48. pwm1: pwm@40b00010 {
  49. compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  50. reg = <0x40b00010 0x10>;
  51. #pwm-cells = <1>;
  52. clocks = <&clks CLK_PWM1>;
  53. };
  54. pwm2: pwm@40c00000 {
  55. compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  56. reg = <0x40c00000 0x10>;
  57. #pwm-cells = <1>;
  58. clocks = <&clks CLK_PWM0>;
  59. };
  60. pwm3: pwm@40c00010 {
  61. compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  62. reg = <0x40c00010 0x10>;
  63. #pwm-cells = <1>;
  64. clocks = <&clks CLK_PWM1>;
  65. };
  66. pwri2c: i2c@40f00180 {
  67. compatible = "mrvl,pxa-i2c";
  68. reg = <0x40f00180 0x24>;
  69. interrupts = <6>;
  70. clocks = <&clks CLK_PWRI2C>;
  71. #address-cells = <0x1>;
  72. #size-cells = <0>;
  73. status = "disabled";
  74. };
  75. pxa27x_udc: udc@40600000 {
  76. compatible = "marvell,pxa270-udc";
  77. reg = <0x40600000 0x10000>;
  78. interrupts = <11>;
  79. clocks = <&clks CLK_USB>;
  80. status = "disabled";
  81. };
  82. keypad: keypad@41500000 {
  83. compatible = "marvell,pxa27x-keypad";
  84. reg = <0x41500000 0x4c>;
  85. interrupts = <4>;
  86. clocks = <&clks CLK_KEYPAD>;
  87. status = "disabled";
  88. };
  89. pxa_camera: imaging@50000000 {
  90. compatible = "marvell,pxa270-qci";
  91. reg = <0x50000000 0x1000>;
  92. interrupts = <33>;
  93. dmas = <&pdma 68 0 /* Y channel */
  94. &pdma 69 0 /* U channel */
  95. &pdma 70 0>; /* V channel */
  96. dma-names = "CI_Y", "CI_U", "CI_V";
  97. clocks = <&clks CLK_CAMERA>;
  98. clock-names = "ciclk";
  99. clock-frequency = <5000000>;
  100. clock-output-names = "qci_mclk";
  101. status = "disabled";
  102. };
  103. rtc@40900000 {
  104. clocks = <&clks CLK_OSC32k768>;
  105. };
  106. };
  107. clocks {
  108. /*
  109. * The muxing of external clocks/internal dividers for osc* clock
  110. * sources has been hidden under the carpet by now.
  111. */
  112. #address-cells = <1>;
  113. #size-cells = <1>;
  114. ranges;
  115. clks: pxa2xx_clks@41300004 {
  116. compatible = "marvell,pxa270-clocks";
  117. #clock-cells = <1>;
  118. status = "okay";
  119. };
  120. };
  121. timer@40a00000 {
  122. compatible = "marvell,pxa-timer";
  123. reg = <0x40a00000 0x20>;
  124. interrupts = <26>;
  125. clocks = <&clks CLK_OSTIMER>;
  126. status = "okay";
  127. };
  128. pxa270_opp_table: opp_table0 {
  129. compatible = "operating-points-v2";
  130. opp-104000000 {
  131. opp-hz = /bits/ 64 <104000000>;
  132. opp-microvolt = <900000 900000 1705000>;
  133. clock-latency-ns = <20>;
  134. };
  135. opp-156000000 {
  136. opp-hz = /bits/ 64 <156000000>;
  137. opp-microvolt = <1000000 1000000 1705000>;
  138. clock-latency-ns = <20>;
  139. };
  140. opp-208000000 {
  141. opp-hz = /bits/ 64 <208000000>;
  142. opp-microvolt = <1180000 1180000 1705000>;
  143. clock-latency-ns = <20>;
  144. };
  145. opp-312000000 {
  146. opp-hz = /bits/ 64 <312000000>;
  147. opp-microvolt = <1250000 1250000 1705000>;
  148. clock-latency-ns = <20>;
  149. };
  150. opp-416000000 {
  151. opp-hz = /bits/ 64 <416000000>;
  152. opp-microvolt = <1350000 1350000 1705000>;
  153. clock-latency-ns = <20>;
  154. };
  155. opp-520000000 {
  156. opp-hz = /bits/ 64 <520000000>;
  157. opp-microvolt = <1450000 1450000 1705000>;
  158. clock-latency-ns = <20>;
  159. };
  160. opp-624000000 {
  161. opp-hz = /bits/ 64 <624000000>;
  162. opp-microvolt = <1550000 1550000 1705000>;
  163. clock-latency-ns = <20>;
  164. };
  165. };
  166. };