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- // SPDX-License-Identifier: GPL-2.0
- // Copyright (c) 2018 Nuvoton Technology [email protected]
- // Copyright 2018 Google, Inc.
- #include "nuvoton-common-npcm7xx.dtsi"
- / {
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&gic>;
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- enable-method = "nuvoton,npcm750-smp";
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a9";
- clocks = <&clk NPCM7XX_CLK_CPU>;
- clock-names = "clk_cpu";
- reg = <0>;
- next-level-cache = <&l2>;
- };
- cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a9";
- clocks = <&clk NPCM7XX_CLK_CPU>;
- clock-names = "clk_cpu";
- reg = <1>;
- next-level-cache = <&l2>;
- };
- };
- soc {
- timer@3fe600 {
- compatible = "arm,cortex-a9-twd-timer";
- reg = <0x3fe600 0x20>;
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
- IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&clk NPCM7XX_CLK_AHB>;
- };
- };
- ahb {
- gmac1: eth@f0804000 {
- device_type = "network";
- compatible = "snps,dwmac";
- reg = <0xf0804000 0x2000>;
- interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- ethernet = <1>;
- clocks = <&clk_rg2refck>, <&clk NPCM7XX_CLK_AHB>;
- clock-names = "stmmaceth", "clk_gmac";
- pinctrl-names = "default";
- pinctrl-0 = <&rg2_pins
- &rg2mdio_pins>;
- status = "disabled";
- };
- };
- };
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