nuvoton-npcm730-gbs.dts 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2020 Quanta Computer Inc. [email protected]
  3. /dts-v1/;
  4. #include "nuvoton-npcm730.dtsi"
  5. #include <dt-bindings/gpio/gpio.h>
  6. / {
  7. model = "Quanta GBS Board (Device Tree)";
  8. compatible = "quanta,gbs-bmc","nuvoton,npcm730";
  9. aliases {
  10. ethernet1 = &gmac0;
  11. serial0 = &serial0;
  12. serial1 = &serial1;
  13. serial2 = &serial2;
  14. serial3 = &serial3;
  15. i2c0 = &i2c0;
  16. i2c1 = &i2c1;
  17. i2c2 = &i2c2;
  18. i2c3 = &i2c3;
  19. i2c4 = &i2c4;
  20. i2c5 = &i2c5;
  21. i2c6 = &i2c6;
  22. i2c7 = &i2c7;
  23. i2c8 = &i2c8;
  24. i2c9 = &i2c9;
  25. i2c10 = &i2c10;
  26. i2c11 = &i2c11;
  27. i2c12 = &i2c12;
  28. i2c13 = &i2c13;
  29. i2c14 = &i2c14;
  30. i2c15 = &i2c15;
  31. i2c16 = &i2c0_slotPE0_0;
  32. i2c17 = &i2c0_slotPE1_1;
  33. i2c18 = &i2c0_slotUSB_2;
  34. i2c19 = &i2c0_3;
  35. i2c20 = &i2c5_i2cool_0;
  36. i2c21 = &i2c5_i2cool_1;
  37. i2c22 = &i2c5_i2cool_2;
  38. i2c23 = &i2c5_hsbp_fru_3;
  39. i2c24 = &i2c6_u2_15_0;
  40. i2c25 = &i2c6_u2_14_1;
  41. i2c26 = &i2c6_u2_13_2;
  42. i2c27 = &i2c6_u2_12_3;
  43. i2c28 = &i2c7_u2_11_0;
  44. i2c29 = &i2c7_u2_10_1;
  45. i2c30 = &i2c7_u2_9_2;
  46. i2c31 = &i2c7_u2_8_3;
  47. i2c32 = &i2c9_vddcr_cpu;
  48. i2c33 = &i2c9_vddcr_soc;
  49. i2c34 = &i2c9_vddio_efgh;
  50. i2c35 = &i2c9_vddio_abcd;
  51. i2c36 = &i2c10_u2_7_0;
  52. i2c37 = &i2c10_u2_6_1;
  53. i2c38 = &i2c10_u2_5_2;
  54. i2c39 = &i2c10_u2_4_3;
  55. i2c40 = &i2c11_clk_buf0_0;
  56. i2c41 = &i2c11_clk_buf1_1;
  57. i2c42 = &i2c11_clk_buf2_2;
  58. i2c43 = &i2c11_clk_buf3_3;
  59. i2c44 = &i2c14_u2_3_0;
  60. i2c45 = &i2c14_u2_2_1;
  61. i2c46 = &i2c14_u2_1_2;
  62. i2c47 = &i2c14_u2_0_3;
  63. fiu0 = &fiu0;
  64. fiu1 = &fiu3;
  65. };
  66. chosen {
  67. stdout-path = &serial0;
  68. };
  69. memory {
  70. reg = <0 0x40000000>;
  71. };
  72. gpio-keys {
  73. compatible = "gpio-keys";
  74. sas-cable0 {
  75. label = "sas-cable0";
  76. gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
  77. linux,code = <73>;
  78. };
  79. sas-cable1 {
  80. label = "sas-cable1";
  81. gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
  82. linux,code = <72>;
  83. };
  84. sas-cable2 {
  85. label = "sas-cable2";
  86. gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
  87. linux,code = <71>;
  88. };
  89. sas-cable3 {
  90. label = "sas-cable3";
  91. gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
  92. linux,code = <70>;
  93. };
  94. sata0 {
  95. label = "sata0";
  96. gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
  97. linux,code = <5>;
  98. };
  99. hsbp-cable {
  100. label = "hsbp-cable";
  101. gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
  102. linux,code = <57>;
  103. };
  104. fanbd-cable {
  105. label = "fanbd-cable";
  106. gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
  107. linux,code = <58>;
  108. };
  109. bp12v-cable {
  110. label = "bp12v-cable";
  111. gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
  112. linux,code = <69>;
  113. };
  114. pe-slot0 {
  115. label = "pe-slot0";
  116. gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
  117. linux,code = <120>;
  118. };
  119. pe-slot1 {
  120. label = "pe-slot1";
  121. gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
  122. linux,code = <121>;
  123. };
  124. };
  125. iio-hwmon {
  126. compatible = "iio-hwmon";
  127. io-channels = <&adc 1>, <&adc 2>;
  128. };
  129. iio-hwmon-battery {
  130. compatible = "iio-hwmon";
  131. io-channels = <&adc 0>;
  132. };
  133. leds {
  134. compatible = "gpio-leds";
  135. heartbeat { /* gpio153 */
  136. gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
  137. linux,default-trigger = "heartbeat";
  138. };
  139. attention { /* gpio215 */
  140. gpios = <&gpio6 23 GPIO_ACTIVE_HIGH>;
  141. default-state = "off";
  142. };
  143. sys_boot_status { /* gpio216 */
  144. gpios = <&gpio6 24 GPIO_ACTIVE_HIGH>;
  145. default-state = "keep";
  146. retain-state-shutdown;
  147. };
  148. bmc_fault { /* gpio217 */
  149. gpios = <&gpio6 25 GPIO_ACTIVE_HIGH>;
  150. default-state = "off";
  151. linux,default-trigger = "panic";
  152. panic-indicator;
  153. };
  154. led_u2_0_locate {
  155. gpios = <&pca9535_ledlocate 3 GPIO_ACTIVE_LOW>;
  156. default-state = "off";
  157. };
  158. led_u2_1_locate {
  159. gpios = <&pca9535_ledlocate 2 GPIO_ACTIVE_LOW>;
  160. default-state = "off";
  161. };
  162. led_u2_2_locate {
  163. gpios = <&pca9535_ledlocate 1 GPIO_ACTIVE_LOW>;
  164. default-state = "off";
  165. };
  166. led_u2_3_locate {
  167. gpios = <&pca9535_ledlocate 0 GPIO_ACTIVE_LOW>;
  168. default-state = "off";
  169. };
  170. led_u2_4_locate {
  171. gpios = <&pca9535_ledlocate 7 GPIO_ACTIVE_LOW>;
  172. default-state = "off";
  173. };
  174. led_u2_5_locate {
  175. gpios = <&pca9535_ledlocate 6 GPIO_ACTIVE_LOW>;
  176. default-state = "off";
  177. };
  178. led_u2_6_locate {
  179. gpios = <&pca9535_ledlocate 5 GPIO_ACTIVE_LOW>;
  180. default-state = "off";
  181. };
  182. led_u2_7_locate {
  183. gpios = <&pca9535_ledlocate 4 GPIO_ACTIVE_LOW>;
  184. default-state = "off";
  185. };
  186. led_u2_8_locate {
  187. gpios = <&pca9535_ledlocate 11 GPIO_ACTIVE_LOW>;
  188. default-state = "off";
  189. };
  190. led_u2_9_locate {
  191. gpios = <&pca9535_ledlocate 10 GPIO_ACTIVE_LOW>;
  192. default-state = "off";
  193. };
  194. led_u2_10_locate {
  195. gpios = <&pca9535_ledlocate 9 GPIO_ACTIVE_LOW>;
  196. default-state = "off";
  197. };
  198. led_u2_11_locate {
  199. gpios = <&pca9535_ledlocate 8 GPIO_ACTIVE_LOW>;
  200. default-state = "off";
  201. };
  202. led_u2_12_locate {
  203. gpios = <&pca9535_ledlocate 15 GPIO_ACTIVE_LOW>;
  204. default-state = "off";
  205. };
  206. led_u2_13_locate {
  207. gpios = <&pca9535_ledlocate 14 GPIO_ACTIVE_LOW>;
  208. default-state = "off";
  209. };
  210. led_u2_14_locate {
  211. gpios = <&pca9535_ledlocate 13 GPIO_ACTIVE_LOW>;
  212. default-state = "off";
  213. };
  214. led_u2_15_locate {
  215. gpios = <&pca9535_ledlocate 12 GPIO_ACTIVE_LOW>;
  216. default-state = "off";
  217. };
  218. led_u2_0_fault {
  219. gpios = <&pca9535_ledfault 3 GPIO_ACTIVE_LOW>;
  220. default-state = "off";
  221. };
  222. led_u2_1_fault {
  223. gpios = <&pca9535_ledfault 2 GPIO_ACTIVE_LOW>;
  224. default-state = "off";
  225. };
  226. led_u2_2_fault {
  227. gpios = <&pca9535_ledfault 1 GPIO_ACTIVE_LOW>;
  228. default-state = "off";
  229. };
  230. led_u2_3_fault {
  231. gpios = <&pca9535_ledfault 0 GPIO_ACTIVE_LOW>;
  232. default-state = "off";
  233. };
  234. led_u2_4_fault {
  235. gpios = <&pca9535_ledfault 7 GPIO_ACTIVE_LOW>;
  236. default-state = "off";
  237. };
  238. led_u2_5_fault {
  239. gpios = <&pca9535_ledfault 6 GPIO_ACTIVE_LOW>;
  240. default-state = "off";
  241. };
  242. led_u2_6_fault {
  243. gpios = <&pca9535_ledfault 5 GPIO_ACTIVE_LOW>;
  244. default-state = "off";
  245. };
  246. led_u2_7_fault {
  247. gpios = <&pca9535_ledfault 4 GPIO_ACTIVE_LOW>;
  248. default-state = "off";
  249. };
  250. led_u2_8_fault {
  251. gpios = <&pca9535_ledfault 11 GPIO_ACTIVE_LOW>;
  252. default-state = "off";
  253. };
  254. led_u2_9_fault {
  255. gpios = <&pca9535_ledfault 10 GPIO_ACTIVE_LOW>;
  256. default-state = "off";
  257. };
  258. led_u2_10_fault {
  259. gpios = <&pca9535_ledfault 9 GPIO_ACTIVE_LOW>;
  260. default-state = "off";
  261. };
  262. led_u2_11_fault {
  263. gpios = <&pca9535_ledfault 8 GPIO_ACTIVE_LOW>;
  264. default-state = "off";
  265. };
  266. led_u2_12_fault {
  267. gpios = <&pca9535_ledfault 15 GPIO_ACTIVE_LOW>;
  268. default-state = "off";
  269. };
  270. led_u2_13_fault {
  271. gpios = <&pca9535_ledfault 14 GPIO_ACTIVE_LOW>;
  272. default-state = "off";
  273. };
  274. led_u2_14_fault {
  275. gpios = <&pca9535_ledfault 13 GPIO_ACTIVE_LOW>;
  276. default-state = "off";
  277. };
  278. led_u2_15_fault {
  279. gpios = <&pca9535_ledfault 12 GPIO_ACTIVE_LOW>;
  280. default-state = "off";
  281. };
  282. };
  283. seven-seg-disp {
  284. compatible = "seven-seg-gpio-dev";
  285. refresh-interval-ms = /bits/ 16 <600>;
  286. clock-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  287. data-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
  288. clear-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
  289. };
  290. pcie-slot {
  291. pcie1: pcie-slot@1 {
  292. label = "PE0";
  293. };
  294. pcie2: pcie-slot@2 {
  295. label = "PE1";
  296. };
  297. };
  298. };
  299. &fiu0 {
  300. pinctrl-names = "default";
  301. pinctrl-0 = <&spi0cs1_pins>;
  302. status = "okay";
  303. flash@0 {
  304. compatible = "jedec,spi-nor";
  305. #address-cells = <1>;
  306. #size-cells = <1>;
  307. reg = <0>;
  308. spi-max-frequency = <20000000>;
  309. spi-rx-bus-width = <2>;
  310. label = "bmc";
  311. partitions {
  312. compatible = "fixed-partitions";
  313. #address-cells = <1>;
  314. #size-cells = <1>;
  315. u-boot@0 {
  316. label = "u-boot";
  317. reg = <0x0000000 0xf0000>;
  318. };
  319. image-descriptor@f0000 {
  320. label = "image-descriptor";
  321. reg = <0xf0000 0x10000>;
  322. };
  323. hoth-update@100000 {
  324. label = "hoth-update";
  325. reg = <0x100000 0x100000>;
  326. };
  327. kernel@200000 {
  328. label = "kernel";
  329. reg = <0x200000 0x500000>;
  330. };
  331. rofs@700000 {
  332. label = "rofs";
  333. reg = <0x700000 0x35f0000>;
  334. };
  335. rwfs@3cf0000 {
  336. label = "rwfs";
  337. reg = <0x3cf0000 0x300000>;
  338. };
  339. hoth-mailbox@3ff0000 {
  340. label = "hoth-mailbox";
  341. reg = <0x3ff0000 0x10000>;
  342. };
  343. };
  344. };
  345. };
  346. &fiu3 {
  347. pinctrl-0 = <&spi3_pins>, <&spi3cs1_pins>;
  348. status = "okay";
  349. flash@0 {
  350. compatible = "jedec,spi-nor";
  351. #address-cells = <1>;
  352. #size-cells = <1>;
  353. reg = <0>;
  354. spi-max-frequency = <50000000>;
  355. spi-rx-bus-width = <2>;
  356. m25p,fast-read;
  357. label = "pnor";
  358. };
  359. flash@1 {
  360. compatible = "jedec,spi-nor";
  361. #address-cells = <1>;
  362. #size-cells = <1>;
  363. reg = <1>;
  364. spi-max-frequency = <50000000>;
  365. spi-rx-bus-width = <2>;
  366. m25p,fast-read;
  367. };
  368. };
  369. &gcr {
  370. serial_port_mux: uart-mux-controller {
  371. compatible = "mmio-mux";
  372. #mux-control-cells = <1>;
  373. mux-reg-masks = <0x38 0x07>;
  374. idle-states = <2>; /* Serial port mode 3 (takeover) */
  375. };
  376. uart1_mode_mux: uart1-mode-mux-controller {
  377. compatible = "mmio-mux";
  378. #mux-control-cells = <1>;
  379. mux-reg-masks = <0x64 0x01000000>;
  380. idle-states = <0>; /* Set UART1 mode to normal (follow SPMOD) */
  381. };
  382. };
  383. &gmac0 {
  384. status = "okay";
  385. phy-mode = "rgmii-id";
  386. snps,eee-force-disable;
  387. };
  388. &ehci1 {
  389. status = "okay";
  390. };
  391. &watchdog1 {
  392. status = "okay";
  393. };
  394. &rng {
  395. status = "okay";
  396. };
  397. &serial0 {
  398. status = "okay";
  399. };
  400. &serial1 {
  401. status = "okay";
  402. };
  403. &serial2 {
  404. status = "okay";
  405. };
  406. &serial3 {
  407. status = "okay";
  408. };
  409. &adc {
  410. #io-channel-cells = <1>;
  411. status = "okay";
  412. };
  413. &lpc_kcs {
  414. kcs1: kcs1@0 {
  415. status = "okay";
  416. };
  417. kcs2: kcs2@0 {
  418. status = "okay";
  419. };
  420. kcs3: kcs3@0 {
  421. status = "okay";
  422. };
  423. };
  424. &spi1 {
  425. cs-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; /* dummy - gpio147 */
  426. pinctrl-names = "default";
  427. pinctrl-0 = <&gpio224ol_pins &gpio227o_pins
  428. &gpio228_pins>;
  429. status = "okay";
  430. jtag_master@0 {
  431. compatible = "nuvoton,npcm750-jtag-master";
  432. spi-max-frequency = <25000000>;
  433. reg = <0>;
  434. status = "okay";
  435. pinctrl-names = "pspi", "gpio";
  436. pinctrl-0 = <&pspi2_pins>;
  437. pinctrl-1 = <&gpio224ol_pins &gpio227o_pins
  438. &gpio228_pins>;
  439. tck-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
  440. tdi-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
  441. tdo-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
  442. tms-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
  443. };
  444. };
  445. &i2c0 {
  446. clock-frequency = <100000>;
  447. status = "okay";
  448. i2c-switch@71 {
  449. compatible = "nxp,pca9546";
  450. #address-cells = <1>;
  451. #size-cells = <0>;
  452. reg = <0x71>;
  453. i2c-mux-idle-disconnect;
  454. reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
  455. i2c0_slotPE0_0: i2c@0 {
  456. #address-cells = <1>;
  457. #size-cells = <0>;
  458. reg = <0>;
  459. pcie-slot = &pcie1;
  460. };
  461. i2c0_slotPE1_1: i2c@1 {
  462. #address-cells = <1>;
  463. #size-cells = <0>;
  464. reg = <1>;
  465. pcie-slot = &pcie2;
  466. };
  467. i2c0_slotUSB_2: i2c@2 {
  468. #address-cells = <1>;
  469. #size-cells = <0>;
  470. reg = <2>;
  471. };
  472. i2c0_3: i2c@3 {
  473. #address-cells = <1>;
  474. #size-cells = <0>;
  475. reg = <3>;
  476. };
  477. };
  478. };
  479. &i2c1 {
  480. clock-frequency = <100000>;
  481. status = "okay";
  482. pca9535_ifdet: pca9535-ifdet@24 {
  483. compatible = "nxp,pca9535";
  484. reg = <0x24>;
  485. gpio-controller;
  486. #gpio-cells = <2>;
  487. };
  488. pca9535_pwren: pca9535-pwren@20 {
  489. compatible = "nxp,pca9535";
  490. reg = <0x20>;
  491. gpio-controller;
  492. #gpio-cells = <2>;
  493. gpio-line-names =
  494. "pwr_u2_3_en","pwr_u2_2_en",
  495. "pwr_u2_1_en","pwr_u2_0_en",
  496. "pwr_u2_7_en","pwr_u2_6_en",
  497. "pwr_u2_5_en","pwr_u2_4_en",
  498. "pwr_u2_11_en","pwr_u2_10_en",
  499. "pwr_u2_9_en","pwr_u2_8_en",
  500. "pwr_u2_15_en","pwr_u2_14_en",
  501. "pwr_u2_13_en","pwr_u2_12_en";
  502. };
  503. pca9535_pwrgd: pca9535-pwrgd@21 {
  504. compatible = "nxp,pca9535";
  505. reg = <0x21>;
  506. gpio-controller;
  507. #gpio-cells = <2>;
  508. };
  509. pca9535_ledlocate: pca9535-ledlocate@22 {
  510. compatible = "nxp,pca9535";
  511. reg = <0x22>;
  512. gpio-controller;
  513. #gpio-cells = <2>;
  514. };
  515. pca9535_ledfault: pca9535-ledfault@23 {
  516. compatible = "nxp,pca9535";
  517. reg = <0x23>;
  518. gpio-controller;
  519. #gpio-cells = <2>;
  520. };
  521. pca9535_pwrdisable: pca9535-pwrdisable@25 {
  522. compatible = "nxp,pca9535";
  523. reg = <0x25>;
  524. gpio-controller;
  525. #gpio-cells = <2>;
  526. gpio-line-names =
  527. "u2_3_pwr_dis","u2_2_pwr_dis",
  528. "u2_1_pwr_dis","u2_0_pwr_dis",
  529. "u2_7_pwr_dis","u2_6_pwr_dis",
  530. "u2_5_pwr_dis","u2_4_pwr_dis",
  531. "u2_11_pwr_dis","u2_10_pwr_dis",
  532. "u2_9_pwr_dis","u2_8_pwr_dis",
  533. "u2_15_pwr_dis","u2_14_pwr_dis",
  534. "u2_13_pwr_dis","u2_12_pwr_dis";
  535. };
  536. pca9535_perst: pca9535-perst@26 {
  537. compatible = "nxp,pca9535";
  538. reg = <0x26>;
  539. gpio-controller;
  540. #gpio-cells = <2>;
  541. gpio-line-names =
  542. "u2_15_perst","u2_14_perst",
  543. "u2_13_perst","u2_12_perst",
  544. "u2_11_perst","u2_10_perst",
  545. "u2_9_perst","u2_8_perst",
  546. "u2_7_perst","u2_6_perst",
  547. "u2_5_perst","u2_4_perst",
  548. "u2_3_perst","u2_2_perst",
  549. "u2_1_perst","u2_0_perst";
  550. };
  551. };
  552. &i2c2 {
  553. clock-frequency = <100000>;
  554. status = "okay";
  555. sbtsi@4c {
  556. compatible = "amd,sbtsi";
  557. reg = <0x4c>;
  558. };
  559. };
  560. &i2c5 {
  561. clock-frequency = <100000>;
  562. status = "okay";
  563. mb_fru@50 {
  564. compatible = "atmel,24c64";
  565. reg = <0x50>;
  566. };
  567. i2c-switch@71 {
  568. compatible = "nxp,pca9546";
  569. #address-cells = <1>;
  570. #size-cells = <0>;
  571. reg = <0x71>;
  572. i2c-mux-idle-disconnect;
  573. i2c5_i2cool_0: i2c@0 {
  574. #address-cells = <1>;
  575. #size-cells = <0>;
  576. reg = <0>;
  577. max31725@54 {
  578. compatible = "maxim,max31725";
  579. reg = <0x54>;
  580. status = "okay";
  581. };
  582. };
  583. i2c5_i2cool_1: i2c@1 {
  584. #address-cells = <1>;
  585. #size-cells = <0>;
  586. reg = <1>;
  587. max31725@55 {
  588. compatible = "maxim,max31725";
  589. reg = <0x55>;
  590. status = "okay";
  591. };
  592. };
  593. i2c5_i2cool_2: i2c@2 {
  594. #address-cells = <1>;
  595. #size-cells = <0>;
  596. reg = <2>;
  597. max31725@5d {
  598. compatible = "maxim,max31725";
  599. reg = <0x5d>;
  600. status = "okay";
  601. };
  602. fan_fru@51 {
  603. compatible = "atmel,24c64";
  604. reg = <0x51>;
  605. };
  606. };
  607. i2c5_hsbp_fru_3: i2c@3 {
  608. #address-cells = <1>;
  609. #size-cells = <0>;
  610. reg = <3>;
  611. hsbp_fru@52 {
  612. compatible = "atmel,24c64";
  613. reg = <0x52>;
  614. status = "okay";
  615. };
  616. };
  617. };
  618. };
  619. &i2c6 {
  620. clock-frequency = <100000>;
  621. status = "okay";
  622. i2c-switch@73 {
  623. compatible = "nxp,pca9545";
  624. #address-cells = <1>;
  625. #size-cells = <0>;
  626. reg = <0x73>;
  627. i2c-mux-idle-disconnect;
  628. i2c6_u2_15_0: i2c@0 {
  629. #address-cells = <1>;
  630. #size-cells = <0>;
  631. reg = <0>;
  632. };
  633. i2c6_u2_14_1: i2c@1 {
  634. #address-cells = <1>;
  635. #size-cells = <0>;
  636. reg = <1>;
  637. };
  638. i2c6_u2_13_2: i2c@2 {
  639. #address-cells = <1>;
  640. #size-cells = <0>;
  641. reg = <2>;
  642. };
  643. i2c6_u2_12_3: i2c@3 {
  644. #address-cells = <1>;
  645. #size-cells = <0>;
  646. reg = <3>;
  647. };
  648. };
  649. };
  650. &i2c7 {
  651. clock-frequency = <100000>;
  652. status = "okay";
  653. i2c-switch@72 {
  654. compatible = "nxp,pca9545";
  655. #address-cells = <1>;
  656. #size-cells = <0>;
  657. reg = <0x72>;
  658. i2c-mux-idle-disconnect;
  659. i2c7_u2_11_0: i2c@0 {
  660. #address-cells = <1>;
  661. #size-cells = <0>;
  662. reg = <0>;
  663. };
  664. i2c7_u2_10_1: i2c@1 {
  665. #address-cells = <1>;
  666. #size-cells = <0>;
  667. reg = <1>;
  668. };
  669. i2c7_u2_9_2: i2c@2 {
  670. #address-cells = <1>;
  671. #size-cells = <0>;
  672. reg = <2>;
  673. };
  674. i2c7_u2_8_3: i2c@3 {
  675. #address-cells = <1>;
  676. #size-cells = <0>;
  677. reg = <3>;
  678. };
  679. };
  680. };
  681. &i2c8 {
  682. clock-frequency = <100000>;
  683. status = "okay";
  684. i2c8_adm1272: adm1272@10 {
  685. compatible = "adi,adm1272";
  686. #address-cells = <1>;
  687. #size-cells = <0>;
  688. reg = <0x10>;
  689. shunt-resistor-micro-ohms = <300>;
  690. };
  691. };
  692. &i2c9 {
  693. clock-frequency = <100000>;
  694. status = "okay";
  695. i2c-switch@71 {
  696. compatible = "nxp,pca9546";
  697. #address-cells = <1>;
  698. #size-cells = <0>;
  699. reg = <0x71>;
  700. i2c-mux-idle-disconnect;
  701. reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
  702. i2c9_vddcr_cpu: i2c@0 {
  703. #address-cells = <1>;
  704. #size-cells = <0>;
  705. reg = <0>;
  706. vrm@60 {
  707. compatible = "isil,isl68137";
  708. reg = <0x60>;
  709. };
  710. };
  711. i2c9_vddcr_soc: i2c@1 {
  712. #address-cells = <1>;
  713. #size-cells = <0>;
  714. reg = <1>;
  715. vrm@61 {
  716. compatible = "isil,isl68137";
  717. reg = <0x61>;
  718. };
  719. };
  720. i2c9_vddio_efgh: i2c@2 {
  721. #address-cells = <1>;
  722. #size-cells = <0>;
  723. reg = <2>;
  724. vrm@63 {
  725. compatible = "isil,isl68137";
  726. reg = <0x63>;
  727. };
  728. };
  729. i2c9_vddio_abcd: i2c@3 {
  730. #address-cells = <1>;
  731. #size-cells = <0>;
  732. reg = <3>;
  733. vrm@45 {
  734. compatible = "isil,isl68137";
  735. reg = <0x45>;
  736. };
  737. };
  738. };
  739. };
  740. &i2c10 {
  741. clock-frequency = <100000>;
  742. status = "okay";
  743. i2c-switch@71 {
  744. compatible = "nxp,pca9545";
  745. #address-cells = <1>;
  746. #size-cells = <0>;
  747. reg = <0x71>;
  748. i2c-mux-idle-disconnect;
  749. i2c10_u2_7_0: i2c@0 {
  750. #address-cells = <1>;
  751. #size-cells = <0>;
  752. reg = <0>;
  753. };
  754. i2c10_u2_6_1: i2c@1 {
  755. #address-cells = <1>;
  756. #size-cells = <0>;
  757. reg = <1>;
  758. };
  759. i2c10_u2_5_2: i2c@2 {
  760. #address-cells = <1>;
  761. #size-cells = <0>;
  762. reg = <2>;
  763. };
  764. i2c10_u2_4_3: i2c@3 {
  765. #address-cells = <1>;
  766. #size-cells = <0>;
  767. reg = <3>;
  768. };
  769. };
  770. };
  771. &i2c11 {
  772. clock-frequency = <100000>;
  773. status = "okay";
  774. i2c-switch@76 {
  775. compatible = "nxp,pca9545";
  776. #address-cells = <1>;
  777. #size-cells = <0>;
  778. reg = <0x76>;
  779. i2c-mux-idle-disconnect;
  780. i2c11_clk_buf0_0: i2c@0 {
  781. #address-cells = <1>;
  782. #size-cells = <0>;
  783. reg = <0>;
  784. };
  785. i2c11_clk_buf1_1: i2c@1 {
  786. #address-cells = <1>;
  787. #size-cells = <0>;
  788. reg = <1>;
  789. };
  790. i2c11_clk_buf2_2: i2c@2 {
  791. #address-cells = <1>;
  792. #size-cells = <0>;
  793. reg = <2>;
  794. };
  795. i2c11_clk_buf3_3: i2c@3 {
  796. #address-cells = <1>;
  797. #size-cells = <0>;
  798. reg = <3>;
  799. };
  800. };
  801. };
  802. &i2c12 {
  803. clock-frequency = <100000>;
  804. status = "okay";
  805. max34451@4e {
  806. compatible = "maxim,max34451";
  807. reg = <0x4e>;
  808. };
  809. vrm@5d {
  810. compatible = "isil,isl68137";
  811. reg = <0x5d>;
  812. };
  813. vrm@5e {
  814. compatible = "isil,isl68137";
  815. reg = <0x5e>;
  816. };
  817. };
  818. &i2c13 {
  819. clock-frequency = <100000>;
  820. status = "okay";
  821. };
  822. &i2c14 {
  823. clock-frequency = <100000>;
  824. status = "okay";
  825. i2c-switch@70 {
  826. compatible = "nxp,pca9545";
  827. #address-cells = <1>;
  828. #size-cells = <0>;
  829. reg = <0x70>;
  830. i2c-mux-idle-disconnect;
  831. i2c14_u2_3_0: i2c@0 {
  832. #address-cells = <1>;
  833. #size-cells = <0>;
  834. reg = <0>;
  835. };
  836. i2c14_u2_2_1: i2c@1 {
  837. #address-cells = <1>;
  838. #size-cells = <0>;
  839. reg = <1>;
  840. };
  841. i2c14_u2_1_2: i2c@2 {
  842. #address-cells = <1>;
  843. #size-cells = <0>;
  844. reg = <2>;
  845. };
  846. i2c14_u2_0_3: i2c@3 {
  847. #address-cells = <1>;
  848. #size-cells = <0>;
  849. reg = <3>;
  850. };
  851. };
  852. };
  853. &pwm_fan {
  854. pinctrl-names = "default";
  855. pinctrl-0 = <
  856. &pwm0_pins &pwm1_pins
  857. &pwm2_pins &pwm3_pins
  858. &pwm4_pins
  859. &fanin0_pins &fanin1_pins
  860. &fanin2_pins &fanin3_pins
  861. &fanin4_pins
  862. >;
  863. status = "okay";
  864. fan@0 {
  865. reg = <0x00>;
  866. fan-tach-ch = /bits/ 8 <0x00>;
  867. };
  868. fan@1 {
  869. reg = <0x01>;
  870. fan-tach-ch = /bits/ 8 <0x01>;
  871. };
  872. fan@2 {
  873. reg = <0x02>;
  874. fan-tach-ch = /bits/ 8 <0x02>;
  875. };
  876. fan@3 {
  877. reg = <0x04>;
  878. fan-tach-ch = /bits/ 8 <0x04>;
  879. };
  880. fan@4 {
  881. reg = <0x03>;
  882. fan-tach-ch = /bits/ 8 <0x03>;
  883. };
  884. };
  885. &pinctrl {
  886. pinctrl-names = "default";
  887. gpio0: gpio@f0010000 {
  888. /* POWER_OUT=gpio07, RESET_OUT=gpio06, PS_PWROK=gpio13 */
  889. gpio-line-names =
  890. /*0-31*/
  891. "","","","","","","RESET_OUT","POWER_OUT",
  892. "","","","","","PS_PWROK","","",
  893. "","","","","","","","",
  894. "","","","","","","","";
  895. };
  896. gpio1: gpio@f0011000 {
  897. /* SIO_POWER_GOOD=gpio59 */
  898. gpio-line-names =
  899. /*32-63*/
  900. "","","","","","","","",
  901. "","","","","","","","",
  902. "","","","","","","","",
  903. "","","","SIO_POWER_GOOD","","","","";
  904. };
  905. gpio2: gpio@f0012000 {
  906. bmc_usb_mux_oe_n {
  907. gpio-hog;
  908. gpios = <25 GPIO_ACTIVE_HIGH>;
  909. output-low;
  910. line-name = "bmc-usb-mux-oe-n";
  911. };
  912. bmc_usb_mux_sel {
  913. gpio-hog;
  914. gpios = <26 GPIO_ACTIVE_HIGH>;
  915. output-low;
  916. line-name = "bmc-usb-mux-sel";
  917. };
  918. bmc_usb2517_reset_n {
  919. gpio-hog;
  920. gpios = <27 GPIO_ACTIVE_LOW>;
  921. output-low;
  922. line-name = "bmc-usb2517-reset-n";
  923. };
  924. };
  925. gpio3: gpio@f0013000 {
  926. assert_cpu0_reset {
  927. gpio-hog;
  928. gpios = <14 GPIO_ACTIVE_HIGH>;
  929. output-low;
  930. line-name = "assert-cpu0-reset";
  931. };
  932. assert_pwrok_cpu0_n {
  933. gpio-hog;
  934. gpios = <15 GPIO_ACTIVE_HIGH>;
  935. output-low;
  936. line-name = "assert-pwrok-cpu0-n";
  937. };
  938. assert_cpu0_prochot {
  939. gpio-hog;
  940. gpios = <16 GPIO_ACTIVE_HIGH>;
  941. output-low;
  942. line-name = "assert-cpu0-prochot";
  943. };
  944. };
  945. gpio4: gpio@f0014000 {
  946. /* POST_COMPLETE=gpio143 */
  947. gpio-line-names =
  948. /*128-159*/
  949. "","","","","","","","",
  950. "","","","","","","","POST_COMPLETE",
  951. "","","","","","","","",
  952. "","","","","","","","";
  953. };
  954. gpio5: gpio@f0015000 {
  955. /* POWER_BUTTON=gpio177 */
  956. gpio-line-names =
  957. /*160-191*/
  958. "","","","","","","","",
  959. "","","","","","","","",
  960. "","POWER_BUTTON","","","","","","",
  961. "","","","","","","","";
  962. };
  963. gpio6: gpio@f0016000 {
  964. /* SIO_S5=gpio199, RESET_BUTTON=gpio203 */
  965. gpio-line-names =
  966. /*192-223*/
  967. "","","","","","","","SIO_S5",
  968. "","","","RESET_BUTTON","","","","",
  969. "","","","","","","","",
  970. "","","","","","","","";
  971. };
  972. gpio224ol_pins: gpio224ol-pins {
  973. pins = "GPIO224/SPIXCK";
  974. bias-disable;
  975. output-low;
  976. };
  977. gpio227o_pins: gpio227o-pins {
  978. pins = "GPIO227/nSPIXCS0";
  979. bias-disable;
  980. output-high;
  981. };
  982. gpio228_pins: gpio228-pins {
  983. pins = "GPIO228/nSPIXCS1";
  984. bias-disable;
  985. input-enable;
  986. };
  987. };