nspire.dtsi 3.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/arch/arm/boot/nspire.dtsi
  4. *
  5. * Copyright (C) 2013 Daniel Tang <[email protected]>
  6. */
  7. / {
  8. #address-cells = <1>;
  9. #size-cells = <1>;
  10. interrupt-parent = <&intc>;
  11. cpus {
  12. cpu@0 {
  13. compatible = "arm,arm926ej-s";
  14. };
  15. };
  16. bootrom: bootrom@0 {
  17. reg = <0x00000000 0x80000>;
  18. };
  19. sram: sram@a4000000 {
  20. device = "memory";
  21. reg = <0xa4000000 0x20000>;
  22. };
  23. timer_clk: timer_clk {
  24. #clock-cells = <0>;
  25. compatible = "fixed-clock";
  26. clock-frequency = <32768>;
  27. };
  28. base_clk: base_clk {
  29. #clock-cells = <0>;
  30. reg = <0x900b0024 0x4>;
  31. };
  32. ahb_clk: ahb_clk {
  33. #clock-cells = <0>;
  34. reg = <0x900b0024 0x4>;
  35. clocks = <&base_clk>;
  36. };
  37. apb_pclk: apb_pclk {
  38. #clock-cells = <0>;
  39. compatible = "fixed-factor-clock";
  40. clock-div = <2>;
  41. clock-mult = <1>;
  42. clocks = <&ahb_clk>;
  43. };
  44. usb_phy: usb_phy {
  45. compatible = "usb-nop-xceiv";
  46. #phy-cells = <0>;
  47. };
  48. vbus_reg: vbus_reg {
  49. compatible = "regulator-fixed";
  50. regulator-name = "USB VBUS output";
  51. regulator-type = "voltage";
  52. regulator-min-microvolt = <5000000>;
  53. regulator-max-microvolt = <5000000>;
  54. };
  55. ahb {
  56. compatible = "simple-bus";
  57. #address-cells = <1>;
  58. #size-cells = <1>;
  59. ranges;
  60. spi: spi@a9000000 {
  61. reg = <0xa9000000 0x1000>;
  62. };
  63. usb0: usb@b0000000 {
  64. compatible = "lsi,zevio-usb";
  65. reg = <0xb0000000 0x1000>;
  66. interrupts = <8>;
  67. usb-phy = <&usb_phy>;
  68. vbus-supply = <&vbus_reg>;
  69. };
  70. usb1: usb@b4000000 {
  71. reg = <0xb4000000 0x1000>;
  72. interrupts = <9>;
  73. status = "disabled";
  74. };
  75. lcd: lcd@c0000000 {
  76. compatible = "arm,pl111", "arm,primecell";
  77. reg = <0xc0000000 0x1000>;
  78. interrupts = <21>;
  79. /*
  80. * We assume the same clock is fed to APB and CLCDCLK.
  81. * There is some code to scale the clock down by a factor
  82. * 48 for the display so likely the frequency to the
  83. * display is 1MHz and the CLCDCLK is 48 MHz.
  84. */
  85. clocks = <&apb_pclk>, <&apb_pclk>;
  86. clock-names = "clcdclk", "apb_pclk";
  87. };
  88. adc: adc@c4000000 {
  89. reg = <0xc4000000 0x1000>;
  90. interrupts = <11>;
  91. };
  92. tdes: crypto@c8010000 {
  93. reg = <0xc8010000 0x1000>;
  94. };
  95. sha256: crypto@cc000000 {
  96. reg = <0xcc000000 0x1000>;
  97. };
  98. apb@90000000 {
  99. compatible = "simple-bus";
  100. #address-cells = <1>;
  101. #size-cells = <1>;
  102. clock-ranges;
  103. ranges;
  104. gpio: gpio@90000000 {
  105. compatible = "lsi,zevio-gpio";
  106. reg = <0x90000000 0x1000>;
  107. interrupts = <7>;
  108. gpio-controller;
  109. #gpio-cells = <2>;
  110. };
  111. fast_timer: timer@90010000 {
  112. reg = <0x90010000 0x1000>;
  113. interrupts = <17>;
  114. };
  115. uart: serial@90020000 {
  116. reg = <0x90020000 0x1000>;
  117. interrupts = <1>;
  118. };
  119. timer0: timer@900c0000 {
  120. reg = <0x900c0000 0x1000>;
  121. clocks = <&timer_clk>, <&timer_clk>,
  122. <&timer_clk>;
  123. clock-names = "timer0clk", "timer1clk",
  124. "apb_pclk";
  125. };
  126. timer1: timer@900d0000 {
  127. reg = <0x900d0000 0x1000>;
  128. interrupts = <19>;
  129. clocks = <&timer_clk>, <&timer_clk>,
  130. <&timer_clk>;
  131. clock-names = "timer0clk", "timer1clk",
  132. "apb_pclk";
  133. };
  134. watchdog: watchdog@90060000 {
  135. compatible = "arm,amba-primecell";
  136. reg = <0x90060000 0x1000>;
  137. interrupts = <3>;
  138. };
  139. rtc: rtc@90090000 {
  140. reg = <0x90090000 0x1000>;
  141. interrupts = <4>;
  142. };
  143. misc: misc@900a0000 {
  144. reg = <0x900a0000 0x1000>;
  145. };
  146. pwr: pwr@900b0000 {
  147. reg = <0x900b0000 0x1000>;
  148. interrupts = <15>;
  149. };
  150. keypad: input@900e0000 {
  151. compatible = "ti,nspire-keypad";
  152. reg = <0x900e0000 0x1000>;
  153. interrupts = <16>;
  154. scan-interval = <1000>;
  155. row-delay = <200>;
  156. clocks = <&apb_pclk>;
  157. };
  158. contrast: contrast@900f0000 {
  159. reg = <0x900f0000 0x1000>;
  160. };
  161. led: led@90110000 {
  162. reg = <0x90110000 0x1000>;
  163. };
  164. };
  165. };
  166. };