mt7629-rfb.dts 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2019 MediaTek Inc.
  4. * Author: Ryder Lee <[email protected]>
  5. */
  6. /dts-v1/;
  7. #include <dt-bindings/input/input.h>
  8. #include "mt7629.dtsi"
  9. / {
  10. model = "MediaTek MT7629 reference board";
  11. compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
  12. aliases {
  13. serial0 = &uart0;
  14. };
  15. chosen {
  16. stdout-path = "serial0:115200n8";
  17. };
  18. gpio-keys {
  19. compatible = "gpio-keys";
  20. button-reset {
  21. label = "factory";
  22. linux,code = <KEY_RESTART>;
  23. gpios = <&pio 60 GPIO_ACTIVE_LOW>;
  24. };
  25. button-wps {
  26. label = "wps";
  27. linux,code = <KEY_WPS_BUTTON>;
  28. gpios = <&pio 58 GPIO_ACTIVE_LOW>;
  29. };
  30. };
  31. memory@40000000 {
  32. device_type = "memory";
  33. reg = <0x40000000 0x10000000>;
  34. };
  35. reg_3p3v: regulator-3p3v {
  36. compatible = "regulator-fixed";
  37. regulator-name = "fixed-3.3V";
  38. regulator-min-microvolt = <3300000>;
  39. regulator-max-microvolt = <3300000>;
  40. regulator-boot-on;
  41. regulator-always-on;
  42. };
  43. reg_5v: regulator-5v {
  44. compatible = "regulator-fixed";
  45. regulator-name = "fixed-5V";
  46. regulator-min-microvolt = <5000000>;
  47. regulator-max-microvolt = <5000000>;
  48. regulator-boot-on;
  49. regulator-always-on;
  50. };
  51. };
  52. &eth {
  53. pinctrl-names = "default";
  54. pinctrl-0 = <&eth_pins>;
  55. pinctrl-1 = <&ephy_leds_pins>;
  56. status = "okay";
  57. gmac0: mac@0 {
  58. compatible = "mediatek,eth-mac";
  59. reg = <0>;
  60. phy-mode = "2500base-x";
  61. fixed-link {
  62. speed = <2500>;
  63. full-duplex;
  64. pause;
  65. };
  66. };
  67. gmac1: mac@1 {
  68. compatible = "mediatek,eth-mac";
  69. reg = <1>;
  70. phy-mode = "gmii";
  71. phy-handle = <&phy0>;
  72. };
  73. mdio: mdio-bus {
  74. #address-cells = <1>;
  75. #size-cells = <0>;
  76. phy0: ethernet-phy@0 {
  77. reg = <0>;
  78. };
  79. };
  80. };
  81. &i2c {
  82. pinctrl-names = "default";
  83. pinctrl-0 = <&i2c_pins>;
  84. status = "okay";
  85. };
  86. &qspi {
  87. pinctrl-names = "default";
  88. pinctrl-0 = <&qspi_pins>;
  89. status = "okay";
  90. flash@0 {
  91. compatible = "jedec,spi-nor";
  92. reg = <0>;
  93. partitions {
  94. compatible = "fixed-partitions";
  95. #address-cells = <1>;
  96. #size-cells = <1>;
  97. partition@0 {
  98. label = "u-boot";
  99. reg = <0x00000 0x60000>;
  100. read-only;
  101. };
  102. partition@60000 {
  103. label = "u-boot-env";
  104. reg = <0x60000 0x10000>;
  105. read-only;
  106. };
  107. factory: partition@70000 {
  108. label = "factory";
  109. reg = <0x70000 0x40000>;
  110. read-only;
  111. };
  112. partition@b0000 {
  113. label = "kernel";
  114. reg = <0xb0000 0xb50000>;
  115. };
  116. };
  117. };
  118. };
  119. &pcie1 {
  120. pinctrl-names = "default";
  121. pinctrl-0 = <&pcie_pins>;
  122. status = "okay";
  123. };
  124. &pciephy1 {
  125. status = "okay";
  126. };
  127. &pio {
  128. eth_pins: eth-pins {
  129. mux {
  130. function = "eth";
  131. groups = "mdc_mdio";
  132. };
  133. };
  134. ephy_leds_pins: ephy-leds-pins {
  135. mux {
  136. function = "led";
  137. groups = "gphy_leds_0", "ephy_leds";
  138. };
  139. };
  140. i2c_pins: i2c-pins {
  141. mux {
  142. function = "i2c";
  143. groups = "i2c_0";
  144. };
  145. conf {
  146. pins = "I2C_SDA", "I2C_SCL";
  147. drive-strength = <4>;
  148. bias-disable;
  149. };
  150. };
  151. pcie_pins: pcie-pins {
  152. mux {
  153. function = "pcie";
  154. groups = "pcie_clkreq",
  155. "pcie_pereset",
  156. "pcie_wake";
  157. };
  158. };
  159. pwm_pins: pwm-pins {
  160. mux {
  161. function = "pwm";
  162. groups = "pwm_0";
  163. };
  164. };
  165. /* SPI-NOR is shared pin with serial NAND */
  166. qspi_pins: qspi-pins {
  167. mux {
  168. function = "flash";
  169. groups = "spi_nor";
  170. };
  171. };
  172. /* Serial NAND is shared pin with SPI-NOR */
  173. serial_nand_pins: serial-nand-pins {
  174. mux {
  175. function = "flash";
  176. groups = "snfi";
  177. };
  178. };
  179. spi_pins: spi-pins {
  180. mux {
  181. function = "spi";
  182. groups = "spi_0";
  183. };
  184. };
  185. uart0_pins: uart0-pins {
  186. mux {
  187. function = "uart";
  188. groups = "uart0_txd_rxd" ;
  189. };
  190. };
  191. uart1_pins: uart1-pins {
  192. mux {
  193. function = "uart";
  194. groups = "uart1_0_tx_rx" ;
  195. };
  196. };
  197. uart2_pins: uart2-pins {
  198. mux {
  199. function = "uart";
  200. groups = "uart2_0_txd_rxd" ;
  201. };
  202. };
  203. watchdog_pins: watchdog-pins {
  204. mux {
  205. function = "watchdog";
  206. groups = "watchdog";
  207. };
  208. };
  209. };
  210. &spi {
  211. pinctrl-names = "default";
  212. pinctrl-0 = <&spi_pins>;
  213. status = "okay";
  214. };
  215. &ssusb {
  216. vusb33-supply = <&reg_3p3v>;
  217. vbus-supply = <&reg_5v>;
  218. status = "okay";
  219. };
  220. &u3phy0 {
  221. status = "okay";
  222. };
  223. &uart0 {
  224. pinctrl-names = "default";
  225. pinctrl-0 = <&uart0_pins>;
  226. status = "okay";
  227. };
  228. &watchdog {
  229. pinctrl-names = "default";
  230. pinctrl-0 = <&watchdog_pins>;
  231. status = "okay";
  232. };