ls1021a-moxa-uc-8410a.dts 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/
  4. *
  5. * Author: Harry YJ Jhou (周亞諄) <[email protected]>
  6. * Jimmy Chen (陳永達) <[email protected]>
  7. * SZ Lin (林上智) <[email protected]>
  8. */
  9. /dts-v1/;
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/input/input.h>
  12. #include "ls1021a.dtsi"
  13. / {
  14. model = "Moxa UC-8410A";
  15. compatible = "fsl,ls1021a-moxa-uc-8410a", "fsl,ls1021a";
  16. aliases {
  17. enet0_rgmii_phy = &rgmii_phy0;
  18. enet1_rgmii_phy = &rgmii_phy1;
  19. enet2_rgmii_phy = &rgmii_phy2;
  20. };
  21. sys_mclk: clock-mclk {
  22. compatible = "fixed-clock";
  23. #clock-cells = <0>;
  24. clock-frequency = <24576000>;
  25. };
  26. reg_3p3v: regulator-3p3v {
  27. compatible = "regulator-fixed";
  28. regulator-name = "3P3V";
  29. regulator-min-microvolt = <3300000>;
  30. regulator-max-microvolt = <3300000>;
  31. regulator-always-on;
  32. };
  33. leds {
  34. compatible = "gpio-leds";
  35. cel-pwr {
  36. label = "UC8410A:CEL-PWR";
  37. gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
  38. default-state = "off";
  39. };
  40. cel-reset {
  41. label = "UC8410A:CEL-RESET";
  42. gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
  43. default-state = "off";
  44. };
  45. str-led {
  46. label = "UC8410A:RED:PROG";
  47. gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
  48. linux,default-trigger = "mmc0";
  49. };
  50. sw-ready {
  51. label = "UC8410A:GREEN:SWRDY";
  52. gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
  53. default-state = "on";
  54. };
  55. beeper {
  56. label = "UC8410A:BEEP";
  57. gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
  58. default-state = "off";
  59. };
  60. prog-led0 {
  61. label = "UC8410A:GREEN:PROG2";
  62. gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
  63. default-state = "off";
  64. };
  65. prog-led1 {
  66. label = "UC8410A:GREEN:PROG1";
  67. gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
  68. default-state = "off";
  69. };
  70. prog-led2 {
  71. label = "UC8410A:GREEN:PROG0";
  72. gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
  73. default-state = "off";
  74. };
  75. wifi-signal0 {
  76. label = "UC8410A:GREEN:CEL2";
  77. gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
  78. default-state = "off";
  79. };
  80. wifi-signal1 {
  81. label = "UC8410A:GREEN:CEL1";
  82. gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
  83. default-state = "off";
  84. };
  85. wifi-signal2 {
  86. label = "UC8410A:GREEN:CEL0";
  87. gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
  88. default-state = "off";
  89. };
  90. cpu-diag-red {
  91. label = "UC8410A:RED:DIA";
  92. gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
  93. default-state = "off";
  94. };
  95. cpu-diag-green {
  96. label = "UC8410A:GREEN:DIA";
  97. gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
  98. default-state = "off";
  99. };
  100. cpu-diag-yellow {
  101. label = "UC8410A:YELLOW:DIA";
  102. gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  103. default-state = "off";
  104. };
  105. };
  106. gpio-keys {
  107. compatible = "gpio-keys";
  108. pushbtn-key {
  109. label = "push button key";
  110. gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
  111. linux,code = <BTN_MISC>;
  112. default-state = "on";
  113. };
  114. };
  115. };
  116. &enet0 {
  117. phy-handle = <&rgmii_phy0>;
  118. phy-connection-type = "rgmii-id";
  119. status = "okay";
  120. };
  121. &enet1 {
  122. phy-handle = <&rgmii_phy1>;
  123. phy-connection-type = "rgmii-id";
  124. status = "okay";
  125. };
  126. &enet2 {
  127. phy-handle = <&rgmii_phy2>;
  128. phy-connection-type = "rgmii-id";
  129. status = "okay";
  130. };
  131. &i2c0 {
  132. clock-frequency = <100000>;
  133. status = "okay";
  134. tpm@20 {
  135. compatible = "infineon,slb9635tt";
  136. reg = <0x20>;
  137. };
  138. rtc@68 {
  139. compatible = "dallas,ds1374";
  140. reg = <0x68>;
  141. };
  142. };
  143. &lpuart0 {
  144. status = "okay";
  145. };
  146. &mdio0 {
  147. rgmii_phy0: ethernet-phy@0 {
  148. compatible = "marvell,88e1118";
  149. reg = <0x0>;
  150. marvell,reg-init =
  151. <3 0x11 0 0x4415>, /* Reg 3,17 */
  152. <3 0x10 0 0x77>; /* Reg 3,16 */
  153. };
  154. rgmii_phy1: ethernet-phy@1 {
  155. compatible = "marvell,88e1118";
  156. reg = <0x1>;
  157. marvell,reg-init =
  158. <3 0x11 0 0x4415>, /* Reg 3,17 */
  159. <3 0x10 0 0x77>; /* Reg 3,16 */
  160. };
  161. rgmii_phy2: ethernet-phy@2 {
  162. compatible = "marvell,88e1118";
  163. reg = <0x2>;
  164. marvell,reg-init =
  165. <3 0x11 0 0x4415>, /* Reg 3,17 */
  166. <3 0x10 0 0x77>; /* Reg 3,16 */
  167. };
  168. };
  169. &qspi {
  170. status = "okay";
  171. flash: flash@0 {
  172. compatible = "spansion,s25fl064l", "spansion,s25fl164k";
  173. #address-cells = <1>;
  174. #size-cells = <1>;
  175. spi-max-frequency = <20000000>;
  176. spi-rx-bus-width = <4>;
  177. spi-tx-bus-width = <4>;
  178. reg = <0>;
  179. partitions@0 {
  180. label = "U-Boot";
  181. reg = <0x0 0x180000>;
  182. };
  183. partitions@180000 {
  184. label = "U-Boot Env";
  185. reg = <0x180000 0x680000>;
  186. };
  187. };
  188. };
  189. &sata {
  190. status = "okay";
  191. };
  192. &uart0 {
  193. status = "okay";
  194. };
  195. &uart1 {
  196. status = "okay";
  197. };