ls1021a-iot.dts 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2021-2022 NXP
  4. *
  5. */
  6. /dts-v1/;
  7. #include "ls1021a.dtsi"
  8. / {
  9. model = "LS1021A-IOT Board";
  10. compatible = "fsl,ls1021a-iot", "fsl,ls1021a";
  11. sys_mclk: clock-mclk {
  12. compatible = "fixed-clock";
  13. #clock-cells = <0>;
  14. clock-frequency = <24576000>;
  15. };
  16. reg_3p3v: regulator-3V3 {
  17. compatible = "regulator-fixed";
  18. regulator-name = "3P3V";
  19. regulator-min-microvolt = <3300000>;
  20. regulator-max-microvolt = <3300000>;
  21. regulator-always-on;
  22. };
  23. reg_2p5v: regulator-2V5 {
  24. compatible = "regulator-fixed";
  25. regulator-name = "2P5V";
  26. regulator-min-microvolt = <2500000>;
  27. regulator-max-microvolt = <2500000>;
  28. regulator-always-on;
  29. };
  30. sound {
  31. compatible = "simple-audio-card";
  32. simple-audio-card,format = "i2s";
  33. simple-audio-card,widgets =
  34. "Microphone", "Microphone Jack",
  35. "Headphone", "Headphone Jack",
  36. "Speaker", "Speaker Ext",
  37. "Line", "Line In Jack";
  38. simple-audio-card,routing =
  39. "MIC_IN", "Microphone Jack",
  40. "Microphone Jack", "Mic Bias",
  41. "LINE_IN", "Line In Jack",
  42. "Headphone Jack", "HP_OUT",
  43. "Speaker Ext", "LINE_OUT";
  44. simple-audio-card,cpu {
  45. sound-dai = <&sai2>;
  46. frame-master;
  47. bitclock-master;
  48. };
  49. simple-audio-card,codec {
  50. sound-dai = <&sgtl5000>;
  51. frame-master;
  52. bitclock-master;
  53. };
  54. };
  55. };
  56. &can0{
  57. status = "disabled";
  58. };
  59. &can1{
  60. status = "disabled";
  61. };
  62. &can2{
  63. status = "disabled";
  64. };
  65. &can3{
  66. status = "okay";
  67. };
  68. &dcu {
  69. display = <&display>;
  70. status = "okay";
  71. display: display@0 {
  72. bits-per-pixel = <24>;
  73. display-timings {
  74. native-mode = <&timing0>;
  75. timing0: mode0 {
  76. clock-frequency = <25000000>;
  77. hactive = <640>;
  78. vactive = <480>;
  79. hback-porch = <80>;
  80. hfront-porch = <80>;
  81. vback-porch = <16>;
  82. vfront-porch = <16>;
  83. hsync-len = <12>;
  84. vsync-len = <2>;
  85. hsync-active = <1>;
  86. vsync-active = <1>;
  87. };
  88. };
  89. };
  90. };
  91. &enet0 {
  92. tbi-handle = <&tbi1>;
  93. phy-handle = <&phy1>;
  94. phy-connection-type = "sgmii";
  95. status = "okay";
  96. };
  97. &enet1 {
  98. tbi-handle = <&tbi1>;
  99. phy-handle = <&phy3>;
  100. phy-connection-type = "sgmii";
  101. status = "okay";
  102. };
  103. &enet2 {
  104. fixed-link = <0 1 1000 0 0>;
  105. phy-connection-type = "rgmii-id";
  106. status = "okay";
  107. };
  108. &esdhc{
  109. status = "okay";
  110. };
  111. &i2c0 {
  112. status = "okay";
  113. pca9555: gpio@23 {
  114. compatible = "nxp,pca9555";
  115. reg = <0x23>;
  116. gpio-controller;
  117. #gpio-cells = <2>;
  118. interrupt-controller;
  119. #interrupt-cells = <2>;
  120. };
  121. sgtl5000: audio-codec@2a {
  122. #sound-dai-cells = <0x0>;
  123. compatible = "fsl,sgtl5000";
  124. reg = <0x2a>;
  125. VDDA-supply = <&reg_3p3v>;
  126. VDDIO-supply = <&reg_2p5v>;
  127. clocks = <&sys_mclk>;
  128. };
  129. max1239: adc@35 {
  130. compatible = "maxim,max1239";
  131. reg = <0x35>;
  132. #io-channel-cells = <1>;
  133. };
  134. ina2201: core-monitor@44 {
  135. compatible = "ti,ina220";
  136. reg = <0x44>;
  137. shunt-resistor = <1000>;
  138. };
  139. ina2202: current-monitor@45 {
  140. compatible = "ti,ina220";
  141. reg = <0x45>;
  142. shunt-resistor = <1000>;
  143. };
  144. lm75b: thermal-monitor@48 {
  145. compatible = "national,lm75b";
  146. reg = <0x48>;
  147. };
  148. };
  149. &lpuart0 {
  150. status = "okay";
  151. };
  152. &mdio0 {
  153. phy0: ethernet-phy@0 {
  154. reg = <0x0>;
  155. };
  156. phy1: ethernet-phy@1 {
  157. reg = <0x1>;
  158. };
  159. phy2: ethernet-phy@2 {
  160. reg = <0x2>;
  161. };
  162. phy3: ethernet-phy@3 {
  163. reg = <0x3>;
  164. };
  165. tbi1: tbi-phy@1f {
  166. reg = <0x1f>;
  167. device_type = "tbi-phy";
  168. };
  169. };
  170. &qspi {
  171. num-cs = <2>;
  172. status = "okay";
  173. s25fl128s: flash@0 {
  174. compatible = "jedec,spi-nor";
  175. #address-cells = <1>;
  176. #size-cells = <1>;
  177. spi-max-frequency = <20000000>;
  178. reg = <0>;
  179. };
  180. };
  181. &sai2 {
  182. status = "okay";
  183. };
  184. &uart0 {
  185. status = "okay";
  186. };
  187. &uart1 {
  188. status = "okay";
  189. };