lpc4357-myd-lpc4357.dts 10 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2. /*
  3. * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel
  4. *
  5. * Copyright (C) 2016-2018 Vladimir Zapolskiy <[email protected]>
  6. */
  7. /dts-v1/;
  8. #include "lpc18xx.dtsi"
  9. #include "lpc4357.dtsi"
  10. #include <dt-bindings/gpio/gpio.h>
  11. / {
  12. model = "MYIR Tech LPC4357 Development Board";
  13. compatible = "myir,myd-lpc4357", "nxp,lpc4357";
  14. chosen {
  15. stdout-path = "serial3:115200n8";
  16. };
  17. memory@28000000 {
  18. device_type = "memory";
  19. reg = <0x28000000 0x2000000>;
  20. };
  21. leds {
  22. compatible = "gpio-leds";
  23. pinctrl-names = "default";
  24. pinctrl-0 = <&led_pins>;
  25. led1 {
  26. gpios = <&gpio LPC_GPIO(6,15) GPIO_ACTIVE_LOW>;
  27. default-state = "off";
  28. };
  29. led2 {
  30. gpios = <&gpio LPC_GPIO(6,16) GPIO_ACTIVE_LOW>;
  31. default-state = "off";
  32. };
  33. led3 {
  34. gpios = <&gpio LPC_GPIO(6,17) GPIO_ACTIVE_LOW>;
  35. default-state = "off";
  36. };
  37. led4 {
  38. gpios = <&gpio LPC_GPIO(6,10) GPIO_ACTIVE_LOW>;
  39. default-state = "off";
  40. };
  41. led5 {
  42. gpios = <&gpio LPC_GPIO(7,14) GPIO_ACTIVE_LOW>;
  43. default-state = "off";
  44. };
  45. led6 {
  46. gpios = <&gpio LPC_GPIO(6,14) GPIO_ACTIVE_LOW>;
  47. default-state = "off";
  48. };
  49. };
  50. panel: panel {
  51. compatible = "innolux,at070tn92";
  52. port {
  53. panel_input: endpoint {
  54. remote-endpoint = <&lcdc_output>;
  55. };
  56. };
  57. };
  58. vcc: vcc_fixed {
  59. compatible = "regulator-fixed";
  60. regulator-name = "vcc-supply";
  61. regulator-min-microvolt = <3300000>;
  62. regulator-max-microvolt = <3300000>;
  63. };
  64. vmmc: vmmc_fixed {
  65. compatible = "regulator-fixed";
  66. regulator-name = "vmmc-supply";
  67. regulator-min-microvolt = <3300000>;
  68. regulator-max-microvolt = <3300000>;
  69. };
  70. };
  71. &pinctrl {
  72. can0_pins: can0-pins {
  73. can_rd_cfg {
  74. pins = "p3_1";
  75. function = "can0";
  76. input-enable;
  77. };
  78. can_td_cfg {
  79. pins = "p3_2";
  80. function = "can0";
  81. };
  82. };
  83. can1_pins: can1-pins {
  84. can_rd_cfg {
  85. pins = "pe_1";
  86. function = "can1";
  87. input-enable;
  88. };
  89. can_td_cfg {
  90. pins = "pe_0";
  91. function = "can1";
  92. };
  93. };
  94. emc_pins: emc-pins {
  95. emc_addr0_22_cfg {
  96. pins = "p2_9", "p2_10", "p2_11", "p2_12",
  97. "p2_13", "p1_0", "p1_1", "p1_2",
  98. "p2_8", "p2_7", "p2_6", "p2_2",
  99. "p2_1", "p2_0", "p6_8", "p6_7",
  100. "pd_16", "pd_15", "pe_0", "pe_1",
  101. "pe_2", "pe_3", "pe_4";
  102. function = "emc";
  103. slew-rate = <1>;
  104. bias-disable;
  105. };
  106. emc_data0_15_cfg {
  107. pins = "p1_7", "p1_8", "p1_9", "p1_10",
  108. "p1_11", "p1_12", "p1_13", "p1_14",
  109. "p5_4", "p5_5", "p5_6", "p5_7",
  110. "p5_0", "p5_1", "p5_2", "p5_3";
  111. function = "emc";
  112. input-enable;
  113. input-schmitt-disable;
  114. slew-rate = <1>;
  115. bias-disable;
  116. };
  117. emc_we_oe_cfg {
  118. pins = "p1_6", "p1_3";
  119. function = "emc";
  120. slew-rate = <1>;
  121. bias-disable;
  122. };
  123. emc_cs0_cfg {
  124. pins = "p1_5";
  125. function = "emc";
  126. slew-rate = <1>;
  127. bias-disable;
  128. };
  129. emc_sdram_dqm0_1_cfg {
  130. pins = "p6_12", "p6_10";
  131. function = "emc";
  132. slew-rate = <1>;
  133. bias-disable;
  134. };
  135. emc_sdram_ras_cas_cfg {
  136. pins = "p6_5", "p6_4";
  137. function = "emc";
  138. slew-rate = <1>;
  139. bias-disable;
  140. };
  141. emc_sdram_dycs0_cfg {
  142. pins = "p6_9";
  143. function = "emc";
  144. slew-rate = <1>;
  145. bias-disable;
  146. };
  147. emc_sdram_cke_cfg {
  148. pins = "p6_11";
  149. function = "emc";
  150. slew-rate = <1>;
  151. bias-disable;
  152. };
  153. emc_sdram_clock_cfg {
  154. pins = "clk0";
  155. function = "emc";
  156. input-enable;
  157. input-schmitt-disable;
  158. slew-rate = <1>;
  159. bias-disable;
  160. };
  161. };
  162. enet_rmii_pins: enet-rmii-pins {
  163. enet_rmii_rxd_cfg {
  164. pins = "p1_15", "p0_0";
  165. function = "enet";
  166. input-enable;
  167. input-schmitt-disable;
  168. slew-rate = <1>;
  169. bias-disable;
  170. };
  171. enet_rmii_txd_cfg {
  172. pins = "p1_18", "p1_20";
  173. function = "enet";
  174. slew-rate = <1>;
  175. bias-disable;
  176. };
  177. enet_rmii_rx_dv_cfg {
  178. pins = "p1_16";
  179. function = "enet";
  180. input-enable;
  181. input-schmitt-disable;
  182. bias-disable;
  183. };
  184. enet_mdio_cfg {
  185. pins = "p1_17";
  186. function = "enet";
  187. input-enable;
  188. input-schmitt-disable;
  189. bias-disable;
  190. };
  191. enet_mdc_cfg {
  192. pins = "pc_1";
  193. function = "enet";
  194. slew-rate = <1>;
  195. bias-disable;
  196. };
  197. enet_rmii_tx_en_cfg {
  198. pins = "p0_1";
  199. function = "enet";
  200. bias-disable;
  201. };
  202. enet_ref_clk_cfg {
  203. pins = "p1_19";
  204. function = "enet";
  205. slew-rate = <1>;
  206. input-enable;
  207. input-schmitt-disable;
  208. bias-disable;
  209. };
  210. };
  211. i2c0_pins: i2c0-pins {
  212. i2c0_pins_cfg {
  213. pins = "i2c0_scl", "i2c0_sda";
  214. function = "i2c0";
  215. input-enable;
  216. };
  217. };
  218. i2c1_pins: i2c1-pins {
  219. i2c1_pins_cfg {
  220. pins = "pe_15", "pe_13";
  221. function = "i2c1";
  222. input-enable;
  223. };
  224. };
  225. lcd_pins: lcd-pins {
  226. lcd_vd0_23_cfg {
  227. pins = "p4_1", "p4_4", "p4_3", "p4_2",
  228. "p8_7", "p8_6", "p8_5", "p8_4",
  229. "p7_5", "p4_8", "p4_10", "p4_9",
  230. "p8_3", "pb_6", "pb_5", "pb_4",
  231. "p7_4", "p7_3", "p7_2", "p7_1",
  232. "pb_3", "pb_2", "pb_1", "pb_0";
  233. function = "lcd";
  234. };
  235. lcd_vsync_en_dclk_lp_pwr_cfg {
  236. pins = "p4_5", "p4_6", "p4_7", "p7_6", "p7_7";
  237. function = "lcd";
  238. };
  239. };
  240. led_pins: led-pins {
  241. led_1_6_cfg {
  242. pins = "pd_1", "pd_2", "pd_3", "pc_11", "pe_14", "pd_0";
  243. function = "gpio";
  244. bias-pull-down;
  245. };
  246. };
  247. sdmmc_pins: sdmmc-pins {
  248. sdmmc_clk_cfg {
  249. pins = "pc_0";
  250. function = "sdmmc";
  251. slew-rate = <1>;
  252. bias-pull-down;
  253. };
  254. sdmmc_cmd_dat0_3_cfg {
  255. pins = "pc_4", "pc_5", "pc_6", "pc_7", "pc_10";
  256. function = "sdmmc";
  257. input-enable;
  258. input-schmitt-disable;
  259. slew-rate = <1>;
  260. bias-disable;
  261. };
  262. sdmmc_cd_cfg {
  263. pins = "pc_8";
  264. function = "sdmmc";
  265. input-enable;
  266. bias-pull-down;
  267. };
  268. };
  269. spifi_pins: spifi-pins {
  270. spifi_sck_cfg {
  271. pins = "p3_3";
  272. function = "spifi";
  273. input-enable;
  274. input-schmitt-disable;
  275. slew-rate = <1>;
  276. bias-disable;
  277. };
  278. spifi_mosi_miso_sio2_sio3_cfg {
  279. pins = "p3_7", "p3_6", "p3_5", "p3_4";
  280. function = "spifi";
  281. input-enable;
  282. input-schmitt-disable;
  283. slew-rate = <1>;
  284. bias-disable;
  285. };
  286. spifi_cs_cfg {
  287. pins = "p3_8";
  288. function = "spifi";
  289. bias-disable;
  290. };
  291. };
  292. ssp1_pins: ssp1-pins {
  293. ssp1_sck_cfg {
  294. pins = "pf_4";
  295. function = "ssp1";
  296. slew-rate = <1>;
  297. bias-pull-down;
  298. };
  299. ssp1_miso_cfg {
  300. pins = "pf_6";
  301. function = "ssp1";
  302. input-enable;
  303. input-schmitt-disable;
  304. slew-rate = <1>;
  305. bias-pull-down;
  306. };
  307. ssp1_mosi_cfg {
  308. pins = "pf_7";
  309. function = "ssp1";
  310. slew-rate = <1>;
  311. bias-pull-down;
  312. };
  313. ssp1_ssel_cfg {
  314. pins = "pf_5";
  315. function = "gpio";
  316. bias-disable;
  317. };
  318. };
  319. uart0_pins: uart0-pins {
  320. uart0_rxd_cfg {
  321. pins = "pf_11";
  322. function = "uart0";
  323. input-enable;
  324. input-schmitt-disable;
  325. bias-disable;
  326. };
  327. uart0_clk_dir_txd_cfg {
  328. pins = "pf_8", "pf_9", "pf_10";
  329. function = "uart0";
  330. bias-pull-down;
  331. };
  332. };
  333. uart1_pins: uart1-pins {
  334. uart1_rxd_cfg {
  335. pins = "pc_14";
  336. function = "uart1";
  337. bias-disable;
  338. input-enable;
  339. input-schmitt-disable;
  340. };
  341. uart1_dtr_txd_cfg {
  342. pins = "pc_12", "pc_13";
  343. function = "uart1";
  344. bias-pull-down;
  345. };
  346. };
  347. uart2_pins: uart2-pins {
  348. uart2_rxd_cfg {
  349. pins = "pa_2";
  350. function = "uart2";
  351. bias-disable;
  352. input-enable;
  353. input-schmitt-disable;
  354. };
  355. uart2_txd_cfg {
  356. pins = "pa_1";
  357. function = "uart2";
  358. bias-pull-down;
  359. };
  360. };
  361. uart3_pins: uart3-pins {
  362. uart3_rx_cfg {
  363. pins = "p2_4";
  364. function = "uart3";
  365. bias-disable;
  366. input-enable;
  367. input-schmitt-disable;
  368. };
  369. uart3_tx_cfg {
  370. pins = "p2_3";
  371. function = "uart3";
  372. bias-pull-down;
  373. };
  374. };
  375. usb0_pins: usb0-pins {
  376. usb0_pwr_enable_cfg {
  377. pins = "p6_3";
  378. function = "usb0";
  379. };
  380. usb0_pwr_fault_cfg {
  381. pins = "p8_0";
  382. function = "usb0";
  383. bias-disable;
  384. input-enable;
  385. };
  386. };
  387. };
  388. &adc1 {
  389. status = "okay";
  390. vref-supply = <&vcc>;
  391. };
  392. &can0 {
  393. status = "okay";
  394. pinctrl-names = "default";
  395. pinctrl-0 = <&can0_pins>;
  396. };
  397. /* Pin conflict with EMC, muxed by JP5 and JP6 */
  398. &can1 {
  399. status = "disabled";
  400. pinctrl-names = "default";
  401. pinctrl-0 = <&can1_pins>;
  402. };
  403. &emc {
  404. status = "okay";
  405. pinctrl-names = "default";
  406. pinctrl-0 = <&emc_pins>;
  407. cs0 {
  408. #address-cells = <2>;
  409. #size-cells = <1>;
  410. ranges;
  411. mpmc,cs = <0>;
  412. mpmc,memory-width = <16>;
  413. mpmc,byte-lane-low;
  414. mpmc,write-enable-delay = <0>;
  415. mpmc,output-enable-delay = <0>;
  416. mpmc,read-access-delay = <70>;
  417. mpmc,page-mode-read-delay = <70>;
  418. /* SST/Microchip SST39VF1601 */
  419. flash@0,0 {
  420. compatible = "cfi-flash";
  421. reg = <0 0 0x400000>;
  422. bank-width = <2>;
  423. };
  424. };
  425. };
  426. &enet_tx_clk {
  427. clock-frequency = <50000000>;
  428. };
  429. &i2c0 {
  430. status = "okay";
  431. pinctrl-names = "default";
  432. pinctrl-0 = <&i2c0_pins>;
  433. clock-frequency = <400000>;
  434. };
  435. &i2c1 {
  436. status = "okay";
  437. pinctrl-names = "default";
  438. pinctrl-0 = <&i2c1_pins>;
  439. clock-frequency = <400000>;
  440. sensor@49 {
  441. compatible = "lm75";
  442. reg = <0x49>;
  443. };
  444. eeprom@50 {
  445. compatible = "atmel,24c512";
  446. reg = <0x50>;
  447. };
  448. };
  449. &lcdc {
  450. status = "okay";
  451. pinctrl-names = "default";
  452. pinctrl-0 = <&lcd_pins>;
  453. max-memory-bandwidth = <92240000>;
  454. port {
  455. lcdc_output: endpoint {
  456. remote-endpoint = <&panel_input>;
  457. arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
  458. };
  459. };
  460. };
  461. &mac {
  462. status = "okay";
  463. phy-mode = "rmii";
  464. pinctrl-names = "default";
  465. pinctrl-0 = <&enet_rmii_pins>;
  466. phy-handle = <&phy1>;
  467. mdio0 {
  468. #address-cells = <1>;
  469. #size-cells = <0>;
  470. compatible = "snps,dwmac-mdio";
  471. phy1: ethernet-phy@1 {
  472. reg = <1>;
  473. };
  474. };
  475. };
  476. &mmcsd {
  477. status = "okay";
  478. pinctrl-names = "default";
  479. pinctrl-0 = <&sdmmc_pins>;
  480. bus-width = <4>;
  481. vmmc-supply = <&vmmc>;
  482. };
  483. /* Pin conflict with SSP0, the latter is routed to J17 pin header */
  484. &spifi {
  485. status = "okay";
  486. pinctrl-names = "default";
  487. pinctrl-0 = <&spifi_pins>;
  488. /* Atmel AT25DF321A */
  489. flash {
  490. compatible = "jedec,spi-nor";
  491. spi-max-frequency = <51000000>;
  492. spi-cpol;
  493. spi-cpha;
  494. };
  495. };
  496. &ssp1 {
  497. status = "okay";
  498. pinctrl-names = "default";
  499. pinctrl-0 = <&ssp1_pins>;
  500. num-cs = <1>;
  501. cs-gpios = <&gpio LPC_GPIO(7,19) GPIO_ACTIVE_LOW>;
  502. };
  503. /* Routed to J17 pin header */
  504. &uart0 {
  505. status = "okay";
  506. pinctrl-names = "default";
  507. pinctrl-0 = <&uart0_pins>;
  508. };
  509. /* RS485 */
  510. &uart1 {
  511. status = "okay";
  512. pinctrl-names = "default";
  513. pinctrl-0 = <&uart1_pins>;
  514. };
  515. /* Routed to J17 pin header */
  516. &uart2 {
  517. status = "okay";
  518. pinctrl-names = "default";
  519. pinctrl-0 = <&uart2_pins>;
  520. };
  521. &uart3 {
  522. status = "okay";
  523. pinctrl-names = "default";
  524. pinctrl-0 = <&uart3_pins>;
  525. };
  526. &usb0 {
  527. status = "okay";
  528. pinctrl-names = "default";
  529. pinctrl-0 = <&usb0_pins>;
  530. };