kirkwood-rd88f6192.dts 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Marvell RD88F6192 Board descrition
  4. *
  5. * Andrew Lunn <[email protected]>
  6. *
  7. * This file contains the definitions that are common between the three
  8. * variants of the Marvell Kirkwood Development Board.
  9. */
  10. /dts-v1/;
  11. #include "kirkwood.dtsi"
  12. #include "kirkwood-6192.dtsi"
  13. / {
  14. model = "Marvell RD88F6192 reference design";
  15. compatible = "marvell,rd88f6192", "marvell,kirkwood-88f6192", "marvell,kirkwood";
  16. memory {
  17. device_type = "memory";
  18. reg = <0x00000000 0x20000000>;
  19. };
  20. chosen {
  21. bootargs = "console=ttyS0,115200n8";
  22. stdout-path = &uart0;
  23. };
  24. ocp@f1000000 {
  25. pinctrl: pin-controller@10000 {
  26. pinctrl-0 = <&pmx_usb_power>;
  27. pinctrl-names = "default";
  28. pmx_usb_power: pmx-usb-power {
  29. marvell,pins = "mpp10";
  30. marvell,function = "gpo";
  31. };
  32. };
  33. serial@12000 {
  34. status = "okay";
  35. };
  36. spi@10600 {
  37. status = "okay";
  38. m25p128@0 {
  39. #address-cells = <1>;
  40. #size-cells = <1>;
  41. compatible = "st,m25p128", "jedec,spi-nor";
  42. reg = <0>;
  43. spi-max-frequency = <20000000>;
  44. mode = <0>;
  45. };
  46. };
  47. sata@80000 {
  48. status = "okay";
  49. nr-ports = <2>;
  50. };
  51. };
  52. regulators {
  53. compatible = "simple-bus";
  54. #address-cells = <1>;
  55. #size-cells = <0>;
  56. pinctrl-0 = <&pmx_usb_power>;
  57. pinctrl-names = "default";
  58. usb_power: regulator@0 {
  59. compatible = "regulator-fixed";
  60. reg = <0>;
  61. regulator-name = "USB VBUS";
  62. regulator-min-microvolt = <5000000>;
  63. regulator-max-microvolt = <5000000>;
  64. enable-active-high;
  65. regulator-always-on;
  66. regulator-boot-on;
  67. gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
  68. };
  69. };
  70. };
  71. &mdio {
  72. status = "okay";
  73. ethphy0: ethernet-phy@8 {
  74. reg = <8>;
  75. };
  76. };
  77. &eth0 {
  78. status = "okay";
  79. ethernet0-port@0 {
  80. phy-handle = <&ethphy0>;
  81. };
  82. };
  83. &pciec {
  84. status = "okay";
  85. };
  86. &pcie0 {
  87. status = "okay";
  88. };