keystone-k2e.dtsi 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Keystone 2 Edison soc device tree
  4. *
  5. * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
  6. */
  7. #include <dt-bindings/reset/ti-syscon.h>
  8. / {
  9. compatible = "ti,k2e", "ti,keystone";
  10. model = "Texas Instruments Keystone 2 Edison SoC";
  11. cpus {
  12. #address-cells = <1>;
  13. #size-cells = <0>;
  14. interrupt-parent = <&gic>;
  15. cpu@0 {
  16. compatible = "arm,cortex-a15";
  17. device_type = "cpu";
  18. reg = <0>;
  19. };
  20. cpu@1 {
  21. compatible = "arm,cortex-a15";
  22. device_type = "cpu";
  23. reg = <1>;
  24. };
  25. cpu@2 {
  26. compatible = "arm,cortex-a15";
  27. device_type = "cpu";
  28. reg = <2>;
  29. };
  30. cpu@3 {
  31. compatible = "arm,cortex-a15";
  32. device_type = "cpu";
  33. reg = <3>;
  34. };
  35. };
  36. aliases {
  37. rproc0 = &dsp0;
  38. };
  39. };
  40. &soc0 {
  41. /include/ "keystone-k2e-clocks.dtsi"
  42. usb: usb@2680000 {
  43. interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
  44. usb@2690000 {
  45. interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
  46. };
  47. };
  48. usb1_phy: usb_phy@2620750 {
  49. compatible = "ti,keystone-usbphy";
  50. #address-cells = <1>;
  51. #size-cells = <1>;
  52. reg = <0x2620750 24>;
  53. status = "disabled";
  54. };
  55. keystone_usb1: usb@25000000 {
  56. compatible = "ti,keystone-dwc3";
  57. #address-cells = <1>;
  58. #size-cells = <1>;
  59. reg = <0x25000000 0x10000>;
  60. clocks = <&clkusb1>;
  61. clock-names = "usb";
  62. interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
  63. ranges;
  64. dma-coherent;
  65. dma-ranges;
  66. status = "disabled";
  67. usb1: usb@25010000 {
  68. compatible = "snps,dwc3";
  69. reg = <0x25010000 0x70000>;
  70. interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
  71. usb-phy = <&usb1_phy>, <&usb1_phy>;
  72. };
  73. };
  74. msm_ram: sram@c000000 {
  75. compatible = "mmio-sram";
  76. reg = <0x0c000000 0x200000>;
  77. ranges = <0x0 0x0c000000 0x200000>;
  78. #address-cells = <1>;
  79. #size-cells = <1>;
  80. bm-sram@1f0000 {
  81. reg = <0x001f0000 0x8000>;
  82. };
  83. };
  84. psc: power-sleep-controller@2350000 {
  85. pscrst: reset-controller {
  86. compatible = "ti,k2e-pscrst", "ti,syscon-reset";
  87. #reset-cells = <1>;
  88. ti,reset-bits = <
  89. 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
  90. >;
  91. };
  92. };
  93. devctrl: device-state-control@2620000 {
  94. dspgpio0: keystone_dsp_gpio@240 {
  95. compatible = "ti,keystone-dsp-gpio";
  96. reg = <0x240 0x4>;
  97. gpio-controller;
  98. #gpio-cells = <2>;
  99. gpio,syscon-dev = <&devctrl 0x240>;
  100. };
  101. };
  102. dsp0: dsp@10800000 {
  103. compatible = "ti,k2e-dsp";
  104. reg = <0x10800000 0x00080000>,
  105. <0x10e00000 0x00008000>,
  106. <0x10f00000 0x00008000>;
  107. reg-names = "l2sram", "l1pram", "l1dram";
  108. clocks = <&clkgem0>;
  109. ti,syscon-dev = <&devctrl 0x844>;
  110. resets = <&pscrst 0>;
  111. interrupt-parent = <&kirq0>;
  112. interrupts = <0 8>;
  113. interrupt-names = "vring", "exception";
  114. kick-gpios = <&dspgpio0 27 0>;
  115. status = "disabled";
  116. };
  117. pcie1: pcie@21020000 {
  118. compatible = "ti,keystone-pcie","snps,dw-pcie";
  119. clocks = <&clkpcie1>;
  120. clock-names = "pcie";
  121. #address-cells = <3>;
  122. #size-cells = <2>;
  123. reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>;
  124. ranges = <0x82000000 0 0x60000000 0x60000000
  125. 0 0x10000000>;
  126. status = "disabled";
  127. device_type = "pci";
  128. num-lanes = <2>;
  129. bus-range = <0x00 0xff>;
  130. /* error interrupt */
  131. interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
  132. #interrupt-cells = <1>;
  133. interrupt-map-mask = <0 0 0 7>;
  134. interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
  135. <0 0 0 2 &pcie_intc1 1>, /* INT B */
  136. <0 0 0 3 &pcie_intc1 2>, /* INT C */
  137. <0 0 0 4 &pcie_intc1 3>; /* INT D */
  138. pcie_msi_intc1: msi-interrupt-controller {
  139. interrupt-controller;
  140. #interrupt-cells = <1>;
  141. interrupt-parent = <&gic>;
  142. interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
  143. <GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
  144. <GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
  145. <GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
  146. <GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
  147. <GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
  148. <GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
  149. <GIC_SPI 384 IRQ_TYPE_EDGE_RISING>;
  150. };
  151. pcie_intc1: legacy-interrupt-controller {
  152. interrupt-controller;
  153. #interrupt-cells = <1>;
  154. interrupt-parent = <&gic>;
  155. interrupts = <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
  156. <GIC_SPI 374 IRQ_TYPE_EDGE_RISING>,
  157. <GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
  158. <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
  159. };
  160. };
  161. mdio: mdio@24200f00 {
  162. compatible = "ti,keystone_mdio", "ti,davinci_mdio";
  163. #address-cells = <1>;
  164. #size-cells = <0>;
  165. reg = <0x24200f00 0x100>;
  166. status = "disabled";
  167. clocks = <&clkcpgmac>;
  168. clock-names = "fck";
  169. bus_freq = <2500000>;
  170. };
  171. /include/ "keystone-k2e-netcp.dtsi"
  172. };