keystone-k2e-evm.dts 3.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Keystone 2 Edison EVM device tree
  4. *
  5. * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
  6. */
  7. /dts-v1/;
  8. #include "keystone.dtsi"
  9. #include "keystone-k2e.dtsi"
  10. / {
  11. compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
  12. model = "Texas Instruments Keystone 2 Edison EVM";
  13. reserved-memory {
  14. #address-cells = <2>;
  15. #size-cells = <2>;
  16. ranges;
  17. dsp_common_memory: dsp-common-memory@81f800000 {
  18. compatible = "shared-dma-pool";
  19. reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
  20. reusable;
  21. status = "okay";
  22. };
  23. };
  24. };
  25. &soc0 {
  26. clocks {
  27. refclksys: refclksys {
  28. #clock-cells = <0>;
  29. compatible = "fixed-clock";
  30. clock-frequency = <100000000>;
  31. clock-output-names = "refclk-sys";
  32. };
  33. refclkpass: refclkpass {
  34. #clock-cells = <0>;
  35. compatible = "fixed-clock";
  36. clock-frequency = <100000000>;
  37. clock-output-names = "refclk-pass";
  38. };
  39. refclkddr3a: refclkddr3a {
  40. #clock-cells = <0>;
  41. compatible = "fixed-clock";
  42. clock-frequency = <100000000>;
  43. clock-output-names = "refclk-ddr3a";
  44. };
  45. };
  46. };
  47. &usb_phy {
  48. status = "okay";
  49. };
  50. &keystone_usb0 {
  51. status = "okay";
  52. };
  53. &usb0 {
  54. dr_mode = "host";
  55. };
  56. &usb1_phy {
  57. status = "okay";
  58. };
  59. &keystone_usb1 {
  60. status = "okay";
  61. };
  62. &usb1 {
  63. dr_mode = "peripheral";
  64. };
  65. &i2c0 {
  66. dtt@50 {
  67. compatible = "atmel,24c1024";
  68. reg = <0x50>;
  69. };
  70. };
  71. &aemif {
  72. cs0 {
  73. #address-cells = <2>;
  74. #size-cells = <1>;
  75. clock-ranges;
  76. ranges;
  77. ti,cs-chipselect = <0>;
  78. /* all timings in nanoseconds */
  79. ti,cs-min-turnaround-ns = <12>;
  80. ti,cs-read-hold-ns = <6>;
  81. ti,cs-read-strobe-ns = <23>;
  82. ti,cs-read-setup-ns = <9>;
  83. ti,cs-write-hold-ns = <8>;
  84. ti,cs-write-strobe-ns = <23>;
  85. ti,cs-write-setup-ns = <8>;
  86. nand@0,0 {
  87. compatible = "ti,keystone-nand","ti,davinci-nand";
  88. #address-cells = <1>;
  89. #size-cells = <1>;
  90. reg = <0 0 0x4000000
  91. 1 0 0x0000100>;
  92. ti,davinci-chipselect = <0>;
  93. ti,davinci-mask-ale = <0x2000>;
  94. ti,davinci-mask-cle = <0x4000>;
  95. ti,davinci-mask-chipsel = <0>;
  96. nand-ecc-mode = "hw";
  97. ti,davinci-ecc-bits = <4>;
  98. nand-on-flash-bbt;
  99. partition@0 {
  100. label = "u-boot";
  101. reg = <0x0 0x100000>;
  102. read-only;
  103. };
  104. partition@100000 {
  105. label = "params";
  106. reg = <0x100000 0x80000>;
  107. read-only;
  108. };
  109. partition@180000 {
  110. label = "ubifs";
  111. reg = <0x180000 0x1FE80000>;
  112. };
  113. };
  114. };
  115. };
  116. &spi0 {
  117. nor_flash: flash@0 {
  118. #address-cells = <1>;
  119. #size-cells = <1>;
  120. compatible = "micron,n25q128a11", "jedec,spi-nor";
  121. spi-max-frequency = <54000000>;
  122. m25p,fast-read;
  123. reg = <0>;
  124. partition@0 {
  125. label = "u-boot-spl";
  126. reg = <0x0 0x80000>;
  127. read-only;
  128. };
  129. partition@1 {
  130. label = "misc";
  131. reg = <0x80000 0xf80000>;
  132. };
  133. };
  134. };
  135. &mdio {
  136. status = "ok";
  137. ethphy0: ethernet-phy@0 {
  138. compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
  139. reg = <0>;
  140. };
  141. ethphy1: ethernet-phy@1 {
  142. compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
  143. reg = <1>;
  144. };
  145. };
  146. &dsp0 {
  147. memory-region = <&dsp_common_memory>;
  148. status = "okay";
  149. };