intel-ixp42x-linksys-nslu2.dts 3.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162
  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Device Tree file for Linksys NSLU2
  4. */
  5. /dts-v1/;
  6. #include "intel-ixp42x.dtsi"
  7. #include <dt-bindings/input/input.h>
  8. / {
  9. model = "Linksys NSLU2 (Network Storage Link for USB 2.0 Disk Drives)";
  10. compatible = "linksys,nslu2", "intel,ixp42x";
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. memory@0 {
  14. /* 32 MB SDRAM */
  15. device_type = "memory";
  16. reg = <0x00000000 0x2000000>;
  17. };
  18. chosen {
  19. bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
  20. stdout-path = "uart0:115200n8";
  21. };
  22. aliases {
  23. serial0 = &uart0;
  24. };
  25. leds {
  26. compatible = "gpio-leds";
  27. led-status {
  28. label = "nslu2:red:status";
  29. gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  30. default-state = "on";
  31. linux,default-trigger = "heartbeat";
  32. };
  33. led-ready {
  34. label = "nslu2:green:ready";
  35. gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
  36. default-state = "on";
  37. };
  38. led-disk-1 {
  39. label = "nslu2:green:disk-1";
  40. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  41. default-state = "off";
  42. };
  43. led-disk-2 {
  44. label = "nslu2:green:disk-2";
  45. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  46. default-state = "off";
  47. };
  48. };
  49. gpio_keys {
  50. compatible = "gpio-keys";
  51. button-power {
  52. wakeup-source;
  53. linux,code = <KEY_POWER>;
  54. label = "power";
  55. gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
  56. };
  57. button-reset {
  58. wakeup-source;
  59. linux,code = <KEY_ESC>;
  60. label = "reset";
  61. gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  62. };
  63. };
  64. i2c {
  65. compatible = "i2c-gpio";
  66. sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  67. scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  68. #address-cells = <1>;
  69. #size-cells = <0>;
  70. rtc@6f {
  71. compatible = "xicor,x1205";
  72. reg = <0x6f>;
  73. };
  74. };
  75. gpio-poweroff {
  76. compatible = "gpio-poweroff";
  77. gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  78. timeout-ms = <5000>;
  79. };
  80. gpio-beeper {
  81. compatible = "gpio-beeper";
  82. gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
  83. };
  84. soc {
  85. bus@c4000000 {
  86. /* The first 16MB region at CS0 on the expansion bus */
  87. flash@0,0 {
  88. compatible = "intel,ixp4xx-flash", "cfi-flash";
  89. bank-width = <2>;
  90. /*
  91. * 8 MB of Flash in 0x20000 byte blocks
  92. * mapped in at CS0.
  93. */
  94. reg = <0 0x00000000 0x800000>;
  95. partitions {
  96. compatible = "redboot-fis";
  97. /* Eraseblock at 0x7e0000 */
  98. fis-index-block = <0x3f>;
  99. };
  100. };
  101. };
  102. pci@c0000000 {
  103. status = "ok";
  104. /*
  105. * Taken from NSLU2 PCI boardfile, INT A, B, C swizzled D constant
  106. * We have slots (IDSEL) 1, 2 and 3.
  107. */
  108. #interrupt-cells = <1>;
  109. interrupt-map-mask = <0xf800 0 0 7>;
  110. interrupt-map =
  111. /* IDSEL 1 */
  112. <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
  113. <0x0800 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 10 */
  114. <0x0800 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 9 */
  115. <0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */
  116. /* IDSEL 2 */
  117. <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
  118. <0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */
  119. <0x1000 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 11 */
  120. <0x1000 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 2 is irq 8 */
  121. /* IDSEL 3 */
  122. <0x1800 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 3 is irq 9 */
  123. <0x1800 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 3 is irq 11 */
  124. <0x1800 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 3 is irq 10 */
  125. <0x1800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 3 is irq 8 */
  126. };
  127. ethernet@c8009000 {
  128. status = "ok";
  129. queue-rx = <&qmgr 3>;
  130. queue-txready = <&qmgr 20>;
  131. phy-mode = "rgmii";
  132. phy-handle = <&phy1>;
  133. mdio {
  134. #address-cells = <1>;
  135. #size-cells = <0>;
  136. phy1: ethernet-phy@1 {
  137. reg = <1>;
  138. };
  139. };
  140. };
  141. };
  142. };